1 /* 2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems 3 * 4 * Based on omap3_evm_config.h 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9 #ifndef __CONFIG_H 10 #define __CONFIG_H 11 12 /* 13 * High Level Configuration Options 14 */ 15 #define CONFIG_OMAP /* in a TI OMAP core */ 16 #define CONFIG_OMAP3_MCX /* working with mcx */ 17 #define CONFIG_OMAP_GPIO 18 #define CONFIG_OMAP_COMMON 19 /* Common ARM Erratas */ 20 #define CONFIG_ARM_ERRATA_454179 21 #define CONFIG_ARM_ERRATA_430973 22 #define CONFIG_ARM_ERRATA_621766 23 24 #define MACH_TYPE_MCX 3656 25 #define CONFIG_MACH_TYPE MACH_TYPE_MCX 26 #define CONFIG_BOARD_LATE_INIT 27 28 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */ 29 30 #include <asm/arch/cpu.h> /* get chip and board defs */ 31 #include <asm/arch/omap.h> 32 33 /* 34 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader 35 * and older u-boot.bin with the new U-Boot SPL. 36 */ 37 #define CONFIG_SYS_TEXT_BASE 0x80008000 38 39 /* 40 * Display CPU and Board information 41 */ 42 #define CONFIG_DISPLAY_CPUINFO 43 #define CONFIG_DISPLAY_BOARDINFO 44 45 /* Clock Defines */ 46 #define V_OSCK 26000000 /* Clock output from T2 */ 47 #define V_SCLK (V_OSCK >> 1) 48 49 #define CONFIG_MISC_INIT_R 50 51 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 52 #define CONFIG_SETUP_MEMORY_TAGS 53 #define CONFIG_INITRD_TAG 54 #define CONFIG_REVISION_TAG 55 56 /* 57 * Size of malloc() pool 58 */ 59 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */ 60 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) 61 /* 62 * DDR related 63 */ 64 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024) 65 66 /* 67 * Hardware drivers 68 */ 69 70 /* 71 * NS16550 Configuration 72 */ 73 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ 74 75 #define CONFIG_SYS_NS16550_SERIAL 76 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 77 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 78 79 /* 80 * select serial console configuration 81 */ 82 #define CONFIG_CONS_INDEX 3 83 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 84 #define CONFIG_SERIAL3 3 /* UART3 */ 85 86 /* allow to overwrite serial and ethaddr */ 87 #define CONFIG_ENV_OVERWRITE 88 #define CONFIG_BAUDRATE 115200 89 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ 90 115200} 91 #define CONFIG_MMC 92 #define CONFIG_OMAP_HSMMC 93 #define CONFIG_GENERIC_MMC 94 #define CONFIG_DOS_PARTITION 95 96 /* EHCI */ 97 #define CONFIG_OMAP3_GPIO_2 98 #define CONFIG_OMAP3_GPIO_5 99 #define CONFIG_USB_EHCI 100 #define CONFIG_USB_EHCI_OMAP 101 #define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 57 102 #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3 103 #define CONFIG_USB_HOST_ETHER 104 #define CONFIG_USB_ETHER_ASIX 105 #define CONFIG_USB_ETHER_MCS7830 106 107 /* commands to include */ 108 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 109 110 #define CONFIG_CMD_DATE 111 #define CONFIG_CMD_NAND /* NAND support */ 112 #define CONFIG_CMD_UBI 113 #define CONFIG_CMD_UBIFS 114 #define CONFIG_RBTREE 115 #define CONFIG_LZO 116 #define CONFIG_MTD_PARTITIONS 117 #define CONFIG_MTD_DEVICE 118 #define CONFIG_CMD_MTDPARTS 119 120 #define CONFIG_SYS_NO_FLASH 121 #define CONFIG_SYS_I2C 122 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 123 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 124 #define CONFIG_SYS_I2C_OMAP34XX 125 126 /* RTC */ 127 #define CONFIG_RTC_DS1337 128 #define CONFIG_SYS_I2C_RTC_ADDR 0x68 129 130 /* 131 * Board NAND Info. 132 */ 133 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 134 /* to access nand */ 135 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ 136 /* to access */ 137 /* nand at CS0 */ 138 139 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ 140 /* NAND devices */ 141 #define CONFIG_JFFS2_NAND 142 /* nand device jffs2 lives on */ 143 #define CONFIG_JFFS2_DEV "nand0" 144 /* start of jffs2 partition */ 145 #define CONFIG_JFFS2_PART_OFFSET 0x680000 146 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */ 147 148 /* Environment information */ 149 150 #define CONFIG_BOOTFILE "uImage" 151 152 /* Setup MTD for NAND on the SOM */ 153 #define MTDIDS_DEFAULT "nand0=omap2-nand.0" 154 #define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \ 155 "1m(u-boot),256k(env1)," \ 156 "256k(env2),6m(kernel),6m(k_recovery)," \ 157 "8m(fs_recovery),-(common_data)" 158 159 #define CONFIG_HOSTNAME mcx 160 #define CONFIG_EXTRA_ENV_SETTINGS \ 161 "adddbg=setenv bootargs ${bootargs} trace_buf_size=64M\0" \ 162 "adddebug=setenv bootargs ${bootargs} earlyprintk=serial\0" \ 163 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \ 164 "addfb=setenv bootargs ${bootargs} vram=6M " \ 165 "omapfb.vram=1:2M,2:2M,3:2M omapdss.def_disp=lcd\0" \ 166 "addip_sta=setenv bootargs ${bootargs} " \ 167 "ip=${ipaddr}:${serverip}:${gatewayip}:" \ 168 "${netmask}:${hostname}:eth0:off\0" \ 169 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 170 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 171 "else run addip_sta;fi\0" \ 172 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 173 "addtty=setenv bootargs ${bootargs} " \ 174 "console=${consoledev},${baudrate}\0" \ 175 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 176 "baudrate=115200\0" \ 177 "consoledev=ttyO2\0" \ 178 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 179 "loadaddr=0x82000000\0" \ 180 "load=tftp ${loadaddr} ${u-boot}\0" \ 181 "load_k=tftp ${loadaddr} ${bootfile}\0" \ 182 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ 183 "loadmlo=tftp ${loadaddr} ${mlo}\0" \ 184 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \ 185 "mmcargs=root=/dev/mmcblk0p2 rw " \ 186 "rootfstype=ext3 rootwait\0" \ 187 "mmcboot=echo Booting from mmc ...; " \ 188 "run mmcargs; " \ 189 "run addip addtty addmtd addfb addeth addmisc;" \ 190 "run loaduimage; " \ 191 "bootm ${loadaddr}\0" \ 192 "net_nfs=run load_k; " \ 193 "run nfsargs; " \ 194 "run addip addtty addmtd addfb addeth addmisc;" \ 195 "bootm ${loadaddr}\0" \ 196 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 197 "nfsroot=${serverip}:${rootpath}\0" \ 198 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \ 199 "uboot_addr=0x80000\0" \ 200 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \ 201 "nand write ${loadaddr} ${uboot_addr} 80000\0" \ 202 "updatemlo=nandecc hw;nand erase 0 20000;" \ 203 "nand write ${loadaddr} 0 20000\0" \ 204 "upd=if run load;then echo Updating u-boot;if run update;" \ 205 "then echo U-Boot updated;" \ 206 "else echo Error updating u-boot !;" \ 207 "echo Board without bootloader !!;" \ 208 "fi;" \ 209 "else echo U-Boot not downloaded..exiting;fi\0" \ 210 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ 211 "bootscript=echo Running bootscript from mmc ...; " \ 212 "source ${loadaddr}\0" \ 213 "nandargs=setenv bootargs ubi.mtd=7 " \ 214 "root=ubi0:rootfs rootfstype=ubifs\0" \ 215 "nandboot=echo Booting from nand ...; " \ 216 "run nandargs; " \ 217 "ubi part nand0,4;" \ 218 "ubi readvol ${loadaddr} kernel;" \ 219 "run addtty addmtd addfb addeth addmisc;" \ 220 "bootm ${loadaddr}\0" \ 221 "preboot=ubi part nand0,7;" \ 222 "ubi readvol ${loadaddr} splash;" \ 223 "bmp display ${loadaddr};" \ 224 "gpio set 55\0" \ 225 "swupdate_args=setenv bootargs root=/dev/ram " \ 226 "quiet loglevel=1 " \ 227 "consoleblank=0 ${swupdate_misc}\0" \ 228 "swupdate=echo Running Sw-Update...;" \ 229 "if printenv mtdparts;then echo Starting SwUpdate...; " \ 230 "else mtdparts default;fi; " \ 231 "ubi part nand0,5;" \ 232 "ubi readvol 0x82000000 kernel_recovery;" \ 233 "ubi part nand0,6;" \ 234 "ubi readvol 0x84000000 fs_recovery;" \ 235 "run swupdate_args; " \ 236 "setenv bootargs ${bootargs} " \ 237 "${mtdparts} " \ 238 "vram=6M omapfb.vram=1:2M,2:2M,3:2M " \ 239 "omapdss.def_disp=lcd;" \ 240 "bootm 0x82000000 0x84000000\0" \ 241 "bootcmd=mmc rescan;if fatload mmc 0 82000000 loadbootscr.scr;" \ 242 "then source 82000000;else run nandboot;fi\0" 243 244 #define CONFIG_AUTO_COMPLETE 245 #define CONFIG_CMDLINE_EDITING 246 247 /* 248 * Miscellaneous configurable options 249 */ 250 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 251 #define CONFIG_SYS_CBSIZE 1024/* Console I/O Buffer Size */ 252 /* Print Buffer Size */ 253 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 254 sizeof(CONFIG_SYS_PROMPT) + 16) 255 #define CONFIG_SYS_MAXARGS 16 /* max number of command */ 256 /* args */ 257 /* Boot Argument Buffer Size */ 258 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) 259 /* memtest works on */ 260 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) 261 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ 262 0x01F00000) /* 31MB */ 263 264 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */ 265 /* address */ 266 #define CONFIG_PREBOOT 267 268 /* 269 * AM3517 has 12 GP timers, they can be driven by the system clock 270 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). 271 * This rate is divided by a local divisor. 272 */ 273 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2 274 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 275 276 /* 277 * Physical Memory Map 278 */ 279 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 280 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 281 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1 282 283 /* 284 * FLASH and environment organization 285 */ 286 287 /* **** PISMO SUPPORT *** */ 288 #define CONFIG_NAND 289 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 290 #define CONFIG_NAND_OMAP_GPMC 291 #define CONFIG_NAND_OMAP_GPMC_PREFETCH 292 #define CONFIG_ENV_IS_IN_NAND 293 #define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */ 294 295 /* Redundant Environment */ 296 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */ 297 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 298 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET 299 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 300 2 * CONFIG_SYS_ENV_SECT_SIZE) 301 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 302 303 /* Flash banks JFFS2 should use */ 304 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \ 305 CONFIG_SYS_MAX_NAND_DEVICE) 306 #define CONFIG_SYS_JFFS2_MEM_NAND 307 /* use flash_info[2] */ 308 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS 309 #define CONFIG_SYS_JFFS2_NUM_BANKS 1 310 311 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 312 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 313 #define CONFIG_SYS_INIT_RAM_SIZE 0x800 314 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 315 CONFIG_SYS_INIT_RAM_SIZE - \ 316 GENERATED_GBL_DATA_SIZE) 317 318 /* Defines for SPL */ 319 #define CONFIG_SPL_FRAMEWORK 320 #define CONFIG_SPL_BOARD_INIT 321 #define CONFIG_SPL_NAND_SIMPLE 322 323 #define CONFIG_SPL_NAND_BASE 324 #define CONFIG_SPL_NAND_DRIVERS 325 #define CONFIG_SPL_NAND_ECC 326 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 327 328 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 329 #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ 330 #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK 331 332 /* move malloc and bss high to prevent clashing with the main image */ 333 #define CONFIG_SYS_SPL_MALLOC_START 0x8f000000 334 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 335 #define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */ 336 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 337 338 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 339 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 340 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 341 342 /* NAND boot config */ 343 #define CONFIG_SYS_NAND_PAGE_COUNT 64 344 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 345 #define CONFIG_SYS_NAND_OOBSIZE 64 346 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 347 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 348 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 349 #define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\ 350 48, 49, 50, 51, 52, 53, 54, 55,\ 351 56, 57, 58, 59, 60, 61, 62, 63} 352 #define CONFIG_SYS_NAND_ECCSIZE 256 353 #define CONFIG_SYS_NAND_ECCBYTES 3 354 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW 355 #define CONFIG_SPL_NAND_SOFTECC 356 357 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE 358 359 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 360 361 /* 362 * ethernet support 363 * 364 */ 365 #if defined(CONFIG_CMD_NET) 366 #define CONFIG_DRIVER_TI_EMAC 367 #define CONFIG_DRIVER_TI_EMAC_USE_RMII 368 #define CONFIG_MII 369 #define CONFIG_BOOTP_DNS 370 #define CONFIG_BOOTP_DNS2 371 #define CONFIG_BOOTP_SEND_HOSTNAME 372 #define CONFIG_NET_RETRY_COUNT 10 373 #endif 374 375 #define CONFIG_VIDEO 376 #define CONFIG_CFB_CONSOLE 377 #define CONFIG_VGA_AS_SINGLE_DEVICE 378 #define CONFIG_SPLASH_SCREEN 379 #define CONFIG_VIDEO_BMP_RLE8 380 #define CONFIG_CMD_BMP 381 #define CONFIG_VIDEO_OMAP3 382 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 383 384 #endif /* __CONFIG_H */ 385