1 /* 2 * Copyright (C) 2016-2017 3 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __CONFIG_H 9 #define __CONFIG_H 10 11 #include <config_distro_defaults.h> 12 #include "mx6_common.h" 13 14 #define CONFIG_SPL_LIBCOMMON_SUPPORT 15 #include "imx6_spl.h" 16 17 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 18 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000) 19 #define CONFIG_SPL_OS_BOOT 20 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + 0x180000) 21 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + 0x1980000) 22 #define CONFIG_SYS_FDT_SIZE (48 * SZ_1K) 23 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 24 25 /* 26 * Below defines are set but NOT really used since we by 27 * design force U-Boot run when we boot in development 28 * mode from SD card (SD2) 29 */ 30 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (0x800) 31 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (0x80) 32 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (0x1000) 33 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 34 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6q-mccmon.dtb" 35 36 /* Size of malloc() pool */ 37 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 38 39 #define CONFIG_BOARD_EARLY_INIT_F 40 #define CONFIG_BOARD_LATE_INIT 41 42 #define CONFIG_MXC_UART 43 #define CONFIG_MXC_UART_BASE UART1_BASE 44 45 #define CONFIG_SYS_MEMTEST_START 0x10000000 46 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 500 * SZ_1M) 47 48 #define CONFIG_MXC_SPI 49 #define CONFIG_SF_DEFAULT_BUS 2 50 #define CONFIG_SF_DEFAULT_CS 0 51 #define CONFIG_SF_DEFAULT_SPEED 25000000 52 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 53 54 /* I2C Configs */ 55 #define CONFIG_SYS_I2C 56 #define CONFIG_SYS_I2C_MXC 57 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 58 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 59 #define CONFIG_SYS_I2C_SPEED 100000 60 61 /* MMC Configuration */ 62 #define CONFIG_SYS_FSL_USDHC_NUM 2 63 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 64 65 /* NOR 16-bit mode */ 66 #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR 67 #define CONFIG_SYS_FLASH_PROTECTION 68 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 69 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 70 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/ 71 #define CONFIG_SYS_FLASH_EMPTY_INFO 72 #define CONFIG_FLASH_CFI_DRIVER /* Use drivers/cfi_flash.c */ 73 #define CONFIG_FLASH_VERIFY 74 75 /* NOR Flash MTD */ 76 #define CONFIG_FLASH_CFI_DRIVER 77 #define CONFIG_FLASH_CFI_MTD 78 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 79 #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } 80 #define CONFIG_SYS_FLASH_BANKS_SIZES { (32 * SZ_1M) } 81 82 /* MTD support */ 83 #define CONFIG_MTD_DEVICE 84 #define CONFIG_MTD_PARTITIONS 85 86 #define MTDIDS_DEFAULT "nor0=8000000.nor" 87 #define MTDPARTS_DEFAULT \ 88 "mtdparts=8000000.nor:" \ 89 "32m@0x0(mccmon6-image.nor)," \ 90 "256k@0x40000(u-boot-env.nor)," \ 91 "1m@0x80000(u-boot.nor)," \ 92 "8m@0x180000(kernel.nor)," \ 93 "8m@0x980000(swupdate-kernel.nor)," \ 94 "8m@0x1180000(swupdate-rootfs.nor)," \ 95 "128k@0x1980000(kernel-dtb.nor)," \ 96 "128k@0x19C0000(swupdate-kernel-dtb.nor)" 97 98 /* USB Configs */ 99 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 100 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 101 #define CONFIG_MXC_USB_FLAGS 0 102 103 /* Ethernet Configuration */ 104 #define CONFIG_FEC_MXC 105 #define CONFIG_MII 106 #define IMX_FEC_BASE ENET_BASE_ADDR 107 #define CONFIG_FEC_XCV_TYPE RGMII 108 #define CONFIG_ETHPRIME "FEC" 109 #define CONFIG_FEC_MXC_PHYADDR 1 110 111 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG 112 #define CONFIG_EXTRA_ENV_SETTINGS \ 113 "console=ttymxc0,115200 quiet\0" \ 114 "fdtfile=imx6q-mccmon6.dtb\0" \ 115 "fdt_high=0xffffffff\0" \ 116 "initrd_high=0xffffffff\0" \ 117 "boot_os=yes\0" \ 118 "download_kernel=" \ 119 "tftpboot ${kernel_addr} ${kernel_file};" \ 120 "tftpboot ${fdt_addr} ${fdtfile};\0" \ 121 "get_boot_medium=" \ 122 "setenv boot_medium nor;" \ 123 "setexpr.l _src_sbmr1 *0x020d8004;" \ 124 "setexpr _b_medium ${_src_sbmr1} '&' 0x00000040;" \ 125 "if test ${_b_medium} = 40; then " \ 126 "setenv boot_medium sdcard;" \ 127 "fi\0" \ 128 "kernel_file=uImage\0" \ 129 "load_kernel=" \ 130 "load mmc ${bootdev}:${bootpart} ${kernel_addr} uImage;" \ 131 "load mmc ${bootdev}:${bootpart} ${fdt_addr} ${fdtfile};\0" \ 132 "boot_sd=" \ 133 "echo '#######################';" \ 134 "echo '# Factory SDcard Boot #';" \ 135 "echo '#######################';" \ 136 "setenv mmcdev 1;" \ 137 "setenv mmcfactorydev 0;" \ 138 "setenv mmcfactorypart 1;" \ 139 "run factory_flash_img;\0" \ 140 "boot_nor=" \ 141 "setenv kernelnor 0x08180000;" \ 142 "setenv dtbnor 0x09980000;" \ 143 "setenv bootargs console=${console} " \ 144 ""MTDPARTS_DEFAULT" " \ 145 "root=/dev/mmcblk1 rootfstype=ext4 rw rootwait noinitrd;" \ 146 "cp.l ${dtbnor} ${dtbloadaddr} 0x8000;" \ 147 "bootm ${kernelnor} - ${dtbloadaddr};\0" \ 148 "boot_recovery=" \ 149 "echo '#######################';" \ 150 "echo '# RECOVERY SWU Boot #';" \ 151 "echo '#######################';" \ 152 "setenv rootfsloadaddr 0x13000000;" \ 153 "setenv swukernelnor 0x08980000;" \ 154 "setenv swurootfsnor 0x09180000;" \ 155 "setenv swudtbnor 0x099A0000;" \ 156 "setenv bootargs console=${console} " \ 157 ""MTDPARTS_DEFAULT" " \ 158 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 159 ":${hostname}::off root=/dev/ram rw;" \ 160 "cp.l ${swurootfsnor} ${rootfsloadaddr} 0x200000;" \ 161 "cp.l ${swudtbnor} ${dtbloadaddr} 0x8000;" \ 162 "bootm ${swukernelnor} ${rootfsloadaddr} ${dtbloadaddr};\0" \ 163 "boot_tftp=" \ 164 "echo '#######################';" \ 165 "echo '# TFTP Boot #';" \ 166 "echo '#######################';" \ 167 "if run download_kernel; then " \ 168 "setenv bootargs console=${console} " \ 169 "root=/dev/mmcblk0p2 rootwait;" \ 170 "bootm ${kernel_addr} - ${fdt_addr};" \ 171 "fi\0" \ 172 "bootcmd=" \ 173 "if test -n ${recovery_status}; then " \ 174 "run boot_recovery;" \ 175 "else " \ 176 "if test ! -n ${boot_medium}; then " \ 177 "run get_boot_medium;" \ 178 "if test ${boot_medium} = sdcard; then " \ 179 "run boot_sd;" \ 180 "else " \ 181 "run boot_nor;" \ 182 "fi;" \ 183 "else " \ 184 "if test ${boot_medium} = tftp; then " \ 185 "run boot_tftp;" \ 186 "fi;" \ 187 "fi;" \ 188 "fi\0" \ 189 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 190 "fdt_addr=0x18000000\0" \ 191 "bootdev=1\0" \ 192 "bootpart=1\0" \ 193 "kernel_addr=" __stringify(CONFIG_LOADADDR) "\0" \ 194 "netdev=eth0\0" \ 195 "load_addr=0x11000000\0" \ 196 "dtbloadaddr=0x12000000\0" \ 197 "uboot_file=u-boot.img\0" \ 198 "SPL_file=SPL\0" \ 199 "load_uboot=tftp ${load_addr} ${uboot_file}\0" \ 200 "nor_img_addr=0x11000000\0" \ 201 "nor_img_file=core-image-lwn-mccmon6.nor\0" \ 202 "emmc_img_file=core-image-lwn-mccmon6.ext4\0" \ 203 "nor_bank_start=" __stringify(CONFIG_SYS_FLASH_BASE) "\0" \ 204 "nor_img_size=0x02000000\0" \ 205 "factory_script_file=factory.scr\0" \ 206 "factory_load_script=" \ 207 "if test -e mmc ${mmcdev}:${mmcfactorypart} " \ 208 "${factory_script_file}; then " \ 209 "load mmc ${mmcdev}:${mmcfactorypart} " \ 210 "${loadaddr} ${factory_script_file};" \ 211 "fi\0" \ 212 "factory_script=echo Running factory script from mmc${mmcdev} ...; " \ 213 "source ${loadaddr}\0" \ 214 "factory_flash_img="\ 215 "echo 'Flash mccmon6 with factory images'; " \ 216 "if run factory_load_script; then " \ 217 "run factory_script;" \ 218 "else " \ 219 "echo No factory script: ${factory_script_file} found on " \ 220 "device ${mmcdev};" \ 221 "run factory_nor_img;" \ 222 "run factory_eMMC_img;" \ 223 "fi\0" \ 224 "factory_eMMC_img="\ 225 "echo 'Update mccmon6 eMMC image'; " \ 226 "if load mmc ${mmcdev}:${mmcfactorypart} " \ 227 "${loadaddr} ${emmc_img_file}; then " \ 228 "setexpr fw_sz ${filesize} / 0x200;" \ 229 "setexpr fw_sz ${fw_sz} + 1;" \ 230 "mmc dev ${mmcfactorydev};" \ 231 "mmc write ${loadaddr} 0x0 ${fw_sz};" \ 232 "fi\0" \ 233 "factory_nor_img="\ 234 "echo 'Update mccmon6 NOR image'; " \ 235 "if load mmc ${mmcdev}:${mmcfactorypart} " \ 236 "${nor_img_addr} ${nor_img_file}; then " \ 237 "run nor_update;" \ 238 "fi\0" \ 239 "nor_update=" \ 240 "protect off ${nor_bank_start} +${nor_img_size};" \ 241 "erase ${nor_bank_start} +${nor_img_size};" \ 242 "setexpr nor_img_size ${nor_img_size} / 4; " \ 243 "cp.l ${nor_img_addr} ${nor_bank_start} ${nor_img_size}\0" \ 244 "tftp_nor_uboot="\ 245 "echo 'Update mccmon6 NOR U-BOOT via TFTP'; " \ 246 "setenv nor_img_file u-boot.img; " \ 247 "setenv nor_img_size 0x80000; " \ 248 "setenv nor_bank_start 0x08080000; " \ 249 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \ 250 "run nor_update;" \ 251 "fi\0" \ 252 "tftp_nor_uImg="\ 253 "echo 'Update mccmon6 NOR uImage via TFTP'; " \ 254 "setenv nor_img_file uImage; " \ 255 "setenv nor_img_size 0x500000; " \ 256 "setenv nor_bank_start 0x08180000; " \ 257 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \ 258 "run nor_update;" \ 259 "fi\0" \ 260 "tftp_nor_dtb="\ 261 "echo 'Update mccmon6 NOR DTB via TFTP'; " \ 262 "setenv nor_img_file imx6q-mccmon6.dtb; " \ 263 "setenv nor_img_size 0x20000; " \ 264 "setenv nor_bank_start 0x09980000; " \ 265 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \ 266 "run nor_update;" \ 267 "fi\0" \ 268 "tftp_nor_img="\ 269 "echo 'Update mccmon6 NOR image via TFTP'; " \ 270 "if tftpboot ${nor_img_addr} ${nor_img_file}; then " \ 271 "run nor_update;" \ 272 "fi\0" \ 273 "tftp_nor_SPL="\ 274 "if tftp ${load_addr} SPL_padded; then " \ 275 "erase 0x08000000 +0x20000;" \ 276 "cp.b ${load_addr} 0x08000000 0x20000;" \ 277 "fi;\0" \ 278 "tftp_sd_SPL="\ 279 "if mmc dev 1; then " \ 280 "if tftp ${load_addr} ${SPL_file}; then " \ 281 "setexpr fw_sz ${filesize} / 0x200; " \ 282 "setexpr fw_sz ${fw_sz} + 1; " \ 283 "mmc write ${load_addr} 0x2 ${fw_sz};" \ 284 "fi;" \ 285 "fi;\0" \ 286 "tftp_sd_uboot="\ 287 "if mmc dev 1; then " \ 288 "if run load_uboot; then " \ 289 "setexpr fw_sz ${filesize} / 0x200; " \ 290 "setexpr fw_sz ${fw_sz} + 1; " \ 291 "mmc write ${load_addr} 0x8A ${fw_sz};" \ 292 "fi;" \ 293 "fi;\0" 294 295 /* Physical Memory Map */ 296 #define CONFIG_NR_DRAM_BANKS 1 297 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 298 299 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 300 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 301 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 302 303 #define CONFIG_SYS_INIT_SP_OFFSET \ 304 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 305 #define CONFIG_SYS_INIT_SP_ADDR \ 306 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 307 308 /* Environment organization */ 309 #define CONFIG_ENV_SIZE (SZ_128K) 310 311 /* Envs are stored in NOR flash */ 312 #define CONFIG_ENV_SECT_SIZE (SZ_128K) 313 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x40000) 314 315 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 316 #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + 0x60000) 317 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 318 319 #endif /* __CONFIG_H * */ 320