xref: /openbmc/u-boot/include/configs/mccmon6.h (revision bf494d7e)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2016-2017
4  * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
5  */
6 
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9 
10 #include "mx6_common.h"
11 
12 #define CONFIG_SPL_LIBCOMMON_SUPPORT
13 #include "imx6_spl.h"
14 
15 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
16 #define CONFIG_SYS_UBOOT_BASE (CONFIG_SYS_FLASH_BASE + 0x80000)
17 #define CONFIG_SPL_OS_BOOT
18 #define CONFIG_SYS_OS_BASE (CONFIG_SYS_FLASH_BASE + 0x180000)
19 #define CONFIG_SYS_FDT_BASE (CONFIG_SYS_FLASH_BASE + 0x1980000)
20 #define CONFIG_SYS_FDT_SIZE (48 * SZ_1K)
21 #define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000
22 
23 /*
24  * Below defines are set but NOT really used since we by
25  * design force U-Boot run when we boot in development
26  * mode from SD card (SD2)
27  */
28 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR (0x800)
29 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (0x80)
30 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR (0x1000)
31 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
32 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6q-mccmon.dtb"
33 
34 /* Size of malloc() pool */
35 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
36 
37 #define CONFIG_BOARD_EARLY_INIT_F
38 #define CONFIG_BOARD_LATE_INIT
39 
40 #define CONFIG_MXC_UART
41 #define CONFIG_MXC_UART_BASE		UART1_BASE
42 
43 #define CONFIG_SYS_MEMTEST_START	0x10000000
44 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 500 * SZ_1M)
45 
46 #define CONFIG_SF_DEFAULT_BUS  2
47 #define CONFIG_SF_DEFAULT_CS   0
48 #define CONFIG_SF_DEFAULT_SPEED 25000000
49 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
50 
51 /* I2C Configs */
52 #define CONFIG_SYS_I2C
53 #define CONFIG_SYS_I2C_MXC
54 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
55 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
56 #define CONFIG_SYS_I2C_SPEED		100000
57 
58 /* MMC Configuration */
59 #define CONFIG_SYS_FSL_USDHC_NUM	2
60 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
61 
62 /* NOR 16-bit mode */
63 #define CONFIG_SYS_FLASH_BASE           WEIM_ARB_BASE_ADDR
64 #define CONFIG_SYS_FLASH_PROTECTION
65 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
66 #define CONFIG_SYS_FLASH_CFI            /* Flash memory is CFI compliant */
67 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* Use buffered writes*/
68 #define CONFIG_SYS_FLASH_EMPTY_INFO
69 #define CONFIG_FLASH_CFI_DRIVER         /* Use drivers/cfi_flash.c */
70 #define CONFIG_FLASH_VERIFY
71 
72 /* NOR Flash MTD */
73 #define CONFIG_FLASH_CFI_DRIVER
74 #define CONFIG_FLASH_CFI_MTD
75 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
76 #define CONFIG_SYS_FLASH_BANKS_LIST	{ (CONFIG_SYS_FLASH_BASE) }
77 #define CONFIG_SYS_FLASH_BANKS_SIZES	{ (32 * SZ_1M) }
78 
79 /* MTD support */
80 
81 /* USB Configs */
82 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
83 #define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
84 #define CONFIG_MXC_USB_FLAGS		0
85 
86 /* Ethernet Configuration */
87 #define CONFIG_FEC_MXC
88 #define IMX_FEC_BASE			ENET_BASE_ADDR
89 #define CONFIG_FEC_XCV_TYPE		RGMII
90 #define CONFIG_ETHPRIME			"FEC"
91 #define CONFIG_FEC_MXC_PHYADDR		1
92 
93 #define CONFIG_EXTRA_ENV_SETTINGS \
94 	"console=ttymxc0,115200 quiet\0" \
95 	"fdtfile=imx6q-mccmon6.dtb\0" \
96 	"fdt_high=0xffffffff\0" \
97 	"initrd_high=0xffffffff\0" \
98 	"boot_os=yes\0" \
99 	"download_kernel=" \
100 		"tftpboot ${kernel_addr} ${kernel_file};" \
101 		"tftpboot ${fdt_addr} ${fdtfile};\0" \
102 	"get_boot_medium=" \
103 		"setenv boot_medium nor;" \
104 		"setexpr.l _src_sbmr1 *0x020d8004;" \
105 		"setexpr _b_medium ${_src_sbmr1} '&' 0x00000040;" \
106 		"if test ${_b_medium} = 40; then " \
107 			"setenv boot_medium sdcard;" \
108 		"fi\0" \
109 	"kernel_file=uImage\0" \
110 	"load_kernel=" \
111 		"load mmc ${bootdev}:${bootpart} ${kernel_addr} uImage;" \
112 		"load mmc ${bootdev}:${bootpart} ${fdt_addr} ${fdtfile};\0" \
113 	"boot_sd=" \
114 		"echo '#######################';" \
115 		"echo '# Factory SDcard Boot #';" \
116 		"echo '#######################';" \
117 		"setenv mmcdev 1;" \
118 		"setenv mmcfactorydev 0;" \
119 		"setenv mmcfactorypart 1;" \
120 		"run factory_flash_img;\0" \
121 	"boot_nor=" \
122 		"setenv kernelnor 0x08180000;" \
123 		"setenv dtbnor 0x09980000;" \
124 		"setenv bootargs console=${console} " \
125 		CONFIG_MTDPARTS_DEFAULT " " \
126 		"root=/dev/mmcblk1 rootfstype=ext4 rw rootwait noinitrd;" \
127 		"cp.l ${dtbnor} ${dtbloadaddr} 0x8000;" \
128 		"bootm ${kernelnor} - ${dtbloadaddr};\0" \
129 	"boot_recovery=" \
130 		"echo '#######################';" \
131 		"echo '# RECOVERY SWU Boot   #';" \
132 		"echo '#######################';" \
133 		"setenv rootfsloadaddr 0x13000000;" \
134 		"setenv swukernelnor 0x08980000;" \
135 		"setenv swurootfsnor 0x09180000;" \
136 		"setenv swudtbnor 0x099A0000;" \
137 		"setenv bootargs console=${console} " \
138 		CONFIG_MTDPARTS_DEFAULT " " \
139 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
140 		    ":${hostname}::off root=/dev/ram rw;" \
141 		"cp.l ${swurootfsnor} ${rootfsloadaddr} 0x200000;" \
142 		"cp.l ${swudtbnor} ${dtbloadaddr} 0x8000;" \
143 		"bootm ${swukernelnor} ${rootfsloadaddr} ${dtbloadaddr};\0" \
144 	"boot_tftp=" \
145 		"echo '#######################';" \
146 		"echo '# TFTP Boot           #';" \
147 		"echo '#######################';" \
148 		"if run download_kernel; then " \
149 		     "setenv bootargs console=${console} " \
150 		     "root=/dev/mmcblk0p2 rootwait;" \
151 		     "bootm ${kernel_addr} - ${fdt_addr};" \
152 		"fi\0" \
153 	"bootcmd=" \
154 		"if test -n ${recovery_status}; then " \
155 		     "run boot_recovery;" \
156 		"else " \
157 		     "if test ! -n ${boot_medium}; then " \
158 			  "run get_boot_medium;" \
159 			  "if test ${boot_medium} = sdcard; then " \
160 			      "run boot_sd;" \
161 			  "else " \
162 			      "run boot_nor;" \
163 			  "fi;" \
164 		     "else " \
165 			  "if test ${boot_medium} = tftp; then " \
166 			      "run boot_tftp;" \
167 			  "fi;" \
168 		     "fi;" \
169 		"fi\0" \
170 	"mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
171 	"fdt_addr=0x18000000\0" \
172 	"bootdev=1\0" \
173 	"bootpart=1\0" \
174 	"kernel_addr=" __stringify(CONFIG_LOADADDR) "\0" \
175 	"netdev=eth0\0" \
176 	"load_addr=0x11000000\0" \
177 	"dtbloadaddr=0x12000000\0" \
178 	"uboot_file=u-boot.img\0" \
179 	"SPL_file=SPL\0" \
180 	"load_uboot=tftp ${load_addr} ${uboot_file}\0" \
181 	"nor_img_addr=0x11000000\0" \
182 	"nor_img_file=core-image-lwn-mccmon6.nor\0" \
183 	"emmc_img_file=core-image-lwn-mccmon6.ext4\0" \
184 	"nor_bank_start=" __stringify(CONFIG_SYS_FLASH_BASE) "\0" \
185 	"nor_img_size=0x02000000\0" \
186 	"factory_script_file=factory.scr\0" \
187 	"factory_load_script=" \
188 		"if test -e mmc ${mmcdev}:${mmcfactorypart} " \
189 		    "${factory_script_file}; then " \
190 		    "load mmc ${mmcdev}:${mmcfactorypart} " \
191 		     "${loadaddr} ${factory_script_file};" \
192 		"fi\0" \
193 	"factory_script=echo Running factory script from mmc${mmcdev} ...; " \
194 		"source ${loadaddr}\0" \
195 	"factory_flash_img="\
196 		"echo 'Flash mccmon6 with factory images'; " \
197 		"if run factory_load_script; then " \
198 			"run factory_script;" \
199 		"else " \
200 		    "echo No factory script: ${factory_script_file} found on " \
201 		    "device ${mmcdev};" \
202 		    "run factory_nor_img;" \
203 		    "run factory_eMMC_img;" \
204 		"fi\0" \
205 	"factory_eMMC_img="\
206 		"echo 'Update mccmon6 eMMC image'; " \
207 		"if load mmc ${mmcdev}:${mmcfactorypart} " \
208 		    "${loadaddr} ${emmc_img_file}; then " \
209 		    "setexpr fw_sz ${filesize} / 0x200;" \
210 		    "setexpr fw_sz ${fw_sz} + 1;" \
211 		    "mmc dev ${mmcfactorydev};" \
212 		    "mmc write ${loadaddr} 0x0 ${fw_sz};" \
213 		"fi\0" \
214 	"factory_nor_img="\
215 		"echo 'Update mccmon6 NOR image'; " \
216 		"if load mmc ${mmcdev}:${mmcfactorypart} " \
217 		    "${nor_img_addr} ${nor_img_file}; then " \
218 			"run nor_update;" \
219 		"fi\0" \
220 	"nor_update=" \
221 		    "protect off ${nor_bank_start} +${nor_img_size};" \
222 		    "erase ${nor_bank_start} +${nor_img_size};" \
223 		    "setexpr nor_img_size ${nor_img_size} / 4; " \
224 		    "cp.l ${nor_img_addr} ${nor_bank_start} ${nor_img_size}\0" \
225 	"tftp_nor_uboot="\
226 		"echo 'Update mccmon6 NOR U-BOOT via TFTP'; " \
227 		"setenv nor_img_file u-boot.img; " \
228 		"setenv nor_img_size 0x80000; " \
229 		"setenv nor_bank_start 0x08080000; " \
230 		"if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
231 		    "run nor_update;" \
232 		"fi\0" \
233 	"tftp_nor_uImg="\
234 		"echo 'Update mccmon6 NOR uImage via TFTP'; " \
235 		"setenv nor_img_file uImage; " \
236 		"setenv nor_img_size 0x500000; " \
237 		"setenv nor_bank_start 0x08180000; " \
238 		"if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
239 		    "run nor_update;" \
240 		"fi\0" \
241 	"tftp_nor_dtb="\
242 		"echo 'Update mccmon6 NOR DTB via TFTP'; " \
243 		"setenv nor_img_file imx6q-mccmon6.dtb; " \
244 		"setenv nor_img_size 0x20000; " \
245 		"setenv nor_bank_start 0x09980000; " \
246 		"if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
247 		    "run nor_update;" \
248 		"fi\0" \
249 	"tftp_nor_img="\
250 		"echo 'Update mccmon6 NOR image via TFTP'; " \
251 		"if tftpboot ${nor_img_addr} ${nor_img_file}; then " \
252 		    "run nor_update;" \
253 		"fi\0" \
254 	"tftp_nor_SPL="\
255 		"if tftp ${load_addr} SPL_padded; then " \
256 		    "erase 0x08000000 +0x20000;" \
257 		    "cp.b ${load_addr} 0x08000000 0x20000;" \
258 		"fi;\0" \
259 	"tftp_sd_SPL="\
260 	    "if mmc dev 1; then "      \
261 		"if tftp ${load_addr} ${SPL_file}; then " \
262 		    "setexpr fw_sz ${filesize} / 0x200; " \
263 		    "setexpr fw_sz ${fw_sz} + 1; " \
264 		    "mmc write ${load_addr} 0x2 ${fw_sz};" \
265 		"fi;" \
266 	    "fi;\0" \
267 	"tftp_sd_uboot="\
268 	    "if mmc dev 1; then "      \
269 		"if run load_uboot; then " \
270 		    "setexpr fw_sz ${filesize} / 0x200; " \
271 		    "setexpr fw_sz ${fw_sz} + 1; " \
272 		    "mmc write ${load_addr} 0x8A ${fw_sz};" \
273 		"fi;" \
274 	    "fi;\0"
275 
276 /* Physical Memory Map */
277 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
278 
279 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
280 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
281 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
282 
283 #define CONFIG_SYS_INIT_SP_OFFSET \
284 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
285 #define CONFIG_SYS_INIT_SP_ADDR \
286 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
287 
288 /* Environment organization */
289 #define CONFIG_ENV_SIZE			(SZ_128K)
290 
291 /* Envs are stored in NOR flash */
292 #define CONFIG_ENV_SECT_SIZE    (SZ_128K)
293 #define CONFIG_ENV_ADDR	(CONFIG_SYS_FLASH_BASE + 0x40000)
294 
295 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
296 #define CONFIG_ENV_ADDR_REDUND	(CONFIG_SYS_FLASH_BASE + 0x60000)
297 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
298 
299 #endif			       /* __CONFIG_H * */
300