1 /* 2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef _MALTA_CONFIG_H 8 #define _MALTA_CONFIG_H 9 10 /* 11 * System configuration 12 */ 13 #define CONFIG_MALTA 14 15 #define CONFIG_MEMSIZE_IN_BYTES 16 17 #define CONFIG_PCI_GT64120 18 #define CONFIG_PCI_MSC01 19 #define CONFIG_PCNET 20 #define CONFIG_PCNET_79C973 21 #define PCNET_HAS_PROM 22 23 #define CONFIG_MISC_INIT_R 24 #define CONFIG_RTC_MC146818 25 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 26 27 /* 28 * CPU Configuration 29 */ 30 #define CONFIG_SYS_MHZ 250 /* arbitrary value */ 31 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) 32 33 /* 34 * Memory map 35 */ 36 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 37 38 #ifdef CONFIG_64BIT 39 # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 40 #else 41 # define CONFIG_SYS_SDRAM_BASE 0x80000000 42 #endif 43 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) 44 45 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 46 47 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000) 48 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 49 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000) 50 51 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 52 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) 53 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) 54 55 #define CONFIG_SYS_CBSIZE 256 56 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 57 sizeof(CONFIG_SYS_PROMPT) + 16) 58 #define CONFIG_SYS_MAXARGS 16 59 60 #define CONFIG_AUTO_COMPLETE 61 #define CONFIG_CMDLINE_EDITING 62 63 /* 64 * Serial driver 65 */ 66 #define CONFIG_BAUDRATE 115200 67 #define CONFIG_SYS_NS16550_PORT_MAPPED 68 69 /* 70 * Flash configuration 71 */ 72 #ifdef CONFIG_64BIT 73 # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 74 #else 75 # define CONFIG_SYS_FLASH_BASE 0xbe000000 76 #endif 77 #define CONFIG_SYS_MAX_FLASH_BANKS 1 78 #define CONFIG_SYS_MAX_FLASH_SECT 128 79 #define CONFIG_SYS_FLASH_CFI 80 #define CONFIG_FLASH_CFI_DRIVER 81 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 82 83 /* 84 * Environment 85 */ 86 #define CONFIG_ENV_IS_IN_FLASH 87 #define CONFIG_ENV_SECT_SIZE 0x20000 88 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 89 #define CONFIG_ENV_ADDR \ 90 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) 91 92 /* 93 * IDE/ATA 94 */ 95 #define CONFIG_SYS_IDE_MAXBUS 1 96 #define CONFIG_SYS_IDE_MAXDEVICE 2 97 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS 98 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 99 #define CONFIG_SYS_ATA_DATA_OFFSET 0 100 #define CONFIG_SYS_ATA_REG_OFFSET 0 101 102 /* 103 * Commands 104 */ 105 #define CONFIG_CMD_DATE 106 #define CONFIG_CMD_IDE 107 #define CONFIG_CMD_PCI 108 109 #define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ 110 111 #endif /* _MALTA_CONFIG_H */ 112