1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> 4 */ 5 6 #ifndef _MALTA_CONFIG_H 7 #define _MALTA_CONFIG_H 8 9 /* 10 * System configuration 11 */ 12 #define CONFIG_MALTA 13 14 #define CONFIG_MEMSIZE_IN_BYTES 15 16 #define CONFIG_PCI_GT64120 17 #define CONFIG_PCI_MSC01 18 #define CONFIG_PCNET 19 #define CONFIG_PCNET_79C973 20 #define PCNET_HAS_PROM 21 22 #define CONFIG_MISC_INIT_R 23 #define CONFIG_RTC_MC146818 24 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 25 26 /* 27 * CPU Configuration 28 */ 29 #define CONFIG_SYS_MHZ 250 /* arbitrary value */ 30 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) 31 32 /* 33 * Memory map 34 */ 35 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 36 37 #ifdef CONFIG_64BIT 38 # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 39 #else 40 # define CONFIG_SYS_SDRAM_BASE 0x80000000 41 #endif 42 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) 43 44 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 45 46 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000) 47 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 48 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000) 49 50 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 51 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) 52 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) 53 54 /* 55 * Serial driver 56 */ 57 #define CONFIG_SYS_NS16550_PORT_MAPPED 58 59 /* 60 * Flash configuration 61 */ 62 #ifdef CONFIG_64BIT 63 # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 64 #else 65 # define CONFIG_SYS_FLASH_BASE 0xbe000000 66 #endif 67 #define CONFIG_SYS_MAX_FLASH_BANKS 1 68 #define CONFIG_SYS_MAX_FLASH_SECT 128 69 #define CONFIG_SYS_FLASH_CFI 70 #define CONFIG_FLASH_CFI_DRIVER 71 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 72 73 /* 74 * Environment 75 */ 76 #define CONFIG_ENV_SECT_SIZE 0x20000 77 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 78 #define CONFIG_ENV_ADDR \ 79 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) 80 81 /* 82 * IDE/ATA 83 */ 84 #define CONFIG_SYS_IDE_MAXBUS 1 85 #define CONFIG_SYS_IDE_MAXDEVICE 2 86 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS 87 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 88 #define CONFIG_SYS_ATA_DATA_OFFSET 0 89 #define CONFIG_SYS_ATA_REG_OFFSET 0 90 91 /* 92 * Commands 93 */ 94 95 #endif /* _MALTA_CONFIG_H */ 96