1 /* 2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef _MALTA_CONFIG_H 8 #define _MALTA_CONFIG_H 9 10 /* 11 * System configuration 12 */ 13 #define CONFIG_MALTA 14 #define CONFIG_BOARD_EARLY_INIT_F 15 16 #define CONFIG_MEMSIZE_IN_BYTES 17 18 #define CONFIG_PCI_GT64120 19 #define CONFIG_PCI_MSC01 20 #define CONFIG_PCNET 21 #define CONFIG_PCNET_79C973 22 #define PCNET_HAS_PROM 23 24 #define CONFIG_MISC_INIT_R 25 #define CONFIG_RTC_MC146818 26 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 27 28 /* 29 * CPU Configuration 30 */ 31 #define CONFIG_SYS_MHZ 250 /* arbitrary value */ 32 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) 33 34 /* 35 * Memory map 36 */ 37 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 38 39 #ifdef CONFIG_64BIT 40 # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 41 #else 42 # define CONFIG_SYS_SDRAM_BASE 0x80000000 43 #endif 44 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) 45 46 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 47 48 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000) 49 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 50 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000) 51 52 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 53 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) 54 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) 55 56 #define CONFIG_SYS_CBSIZE 256 57 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 58 sizeof(CONFIG_SYS_PROMPT) + 16) 59 #define CONFIG_SYS_MAXARGS 16 60 61 #define CONFIG_AUTO_COMPLETE 62 #define CONFIG_CMDLINE_EDITING 63 64 /* 65 * Serial driver 66 */ 67 #define CONFIG_BAUDRATE 115200 68 #define CONFIG_SYS_NS16550_PORT_MAPPED 69 70 /* 71 * Flash configuration 72 */ 73 #ifdef CONFIG_64BIT 74 # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 75 #else 76 # define CONFIG_SYS_FLASH_BASE 0xbe000000 77 #endif 78 #define CONFIG_SYS_MAX_FLASH_BANKS 1 79 #define CONFIG_SYS_MAX_FLASH_SECT 128 80 #define CONFIG_SYS_FLASH_CFI 81 #define CONFIG_FLASH_CFI_DRIVER 82 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 83 84 /* 85 * Environment 86 */ 87 #define CONFIG_ENV_IS_IN_FLASH 88 #define CONFIG_ENV_SECT_SIZE 0x20000 89 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 90 #define CONFIG_ENV_ADDR \ 91 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) 92 93 /* 94 * IDE/ATA 95 */ 96 #define CONFIG_SYS_IDE_MAXBUS 1 97 #define CONFIG_SYS_IDE_MAXDEVICE 2 98 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS 99 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 100 #define CONFIG_SYS_ATA_DATA_OFFSET 0 101 #define CONFIG_SYS_ATA_REG_OFFSET 0 102 103 /* 104 * Commands 105 */ 106 #define CONFIG_CMD_DATE 107 #define CONFIG_CMD_IDE 108 #define CONFIG_CMD_PCI 109 110 #define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ 111 112 #endif /* _MALTA_CONFIG_H */ 113