1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> 4 */ 5 6 #ifndef _MALTA_CONFIG_H 7 #define _MALTA_CONFIG_H 8 9 /* 10 * System configuration 11 */ 12 #define CONFIG_MALTA 13 14 #define CONFIG_MEMSIZE_IN_BYTES 15 16 #define CONFIG_PCI_GT64120 17 #define CONFIG_PCI_MSC01 18 #define CONFIG_PCNET 19 #define CONFIG_PCNET_79C973 20 #define PCNET_HAS_PROM 21 22 #define CONFIG_RTC_MC146818 23 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 24 25 /* 26 * CPU Configuration 27 */ 28 #define CONFIG_SYS_MHZ 250 /* arbitrary value */ 29 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) 30 31 /* 32 * Memory map 33 */ 34 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 35 36 #ifdef CONFIG_64BIT 37 # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 38 #else 39 # define CONFIG_SYS_SDRAM_BASE 0x80000000 40 #endif 41 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) 42 43 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 44 45 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000) 46 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 47 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000) 48 49 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 50 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) 51 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) 52 53 /* 54 * Serial driver 55 */ 56 #define CONFIG_SYS_NS16550_PORT_MAPPED 57 58 /* 59 * Flash configuration 60 */ 61 #ifdef CONFIG_64BIT 62 # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 63 #else 64 # define CONFIG_SYS_FLASH_BASE 0xbe000000 65 #endif 66 #define CONFIG_SYS_MAX_FLASH_BANKS 1 67 #define CONFIG_SYS_MAX_FLASH_SECT 128 68 #define CONFIG_SYS_FLASH_CFI 69 #define CONFIG_FLASH_CFI_DRIVER 70 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 71 72 /* 73 * Environment 74 */ 75 #define CONFIG_ENV_SECT_SIZE 0x20000 76 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 77 #define CONFIG_ENV_ADDR \ 78 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) 79 80 /* 81 * IDE/ATA 82 */ 83 #define CONFIG_SYS_IDE_MAXBUS 1 84 #define CONFIG_SYS_IDE_MAXDEVICE 2 85 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS 86 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 87 #define CONFIG_SYS_ATA_DATA_OFFSET 0 88 #define CONFIG_SYS_ATA_REG_OFFSET 0 89 90 /* 91 * Commands 92 */ 93 94 #endif /* _MALTA_CONFIG_H */ 95