1 /* 2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef _MALTA_CONFIG_H 8 #define _MALTA_CONFIG_H 9 10 #include <asm/addrspace.h> 11 #include <asm/malta.h> 12 13 /* 14 * System configuration 15 */ 16 #define CONFIG_MALTA 17 #define CONFIG_BOARD_EARLY_INIT_F 18 #define CONFIG_DISPLAY_BOARDINFO 19 20 #define CONFIG_MEMSIZE_IN_BYTES 21 22 #define CONFIG_PCI 23 #define CONFIG_PCI_GT64120 24 #define CONFIG_PCI_MSC01 25 #define CONFIG_PCI_PNP 26 #define CONFIG_PCNET 27 #define CONFIG_PCNET_79C973 28 #define PCNET_HAS_PROM 29 30 #define CONFIG_MISC_INIT_R 31 #define CONFIG_RTC_MC146818 32 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 33 34 /* 35 * CPU Configuration 36 */ 37 #define CONFIG_SYS_MHZ 250 /* arbitrary value */ 38 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) 39 40 /* 41 * Memory map 42 */ 43 #define CONFIG_SYS_TEXT_BASE 0xbe000000 /* Rom version */ 44 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 45 46 #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ 47 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) 48 49 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 50 51 #define CONFIG_SYS_LOAD_ADDR 0x81000000 52 #define CONFIG_SYS_MEMTEST_START 0x80100000 53 #define CONFIG_SYS_MEMTEST_END 0x80800000 54 55 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 56 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) 57 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) 58 59 /* 60 * Console configuration 61 */ 62 #undef CONFIG_SYS_PROMPT 63 #if defined(CONFIG_SYS_LITTLE_ENDIAN) 64 #define CONFIG_SYS_PROMPT "maltael # " 65 #else 66 #define CONFIG_SYS_PROMPT "malta # " 67 #endif 68 69 #define CONFIG_SYS_CBSIZE 256 70 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 71 sizeof(CONFIG_SYS_PROMPT) + 16) 72 #define CONFIG_SYS_MAXARGS 16 73 74 #define CONFIG_SYS_HUSH_PARSER 75 #define CONFIG_AUTO_COMPLETE 76 #define CONFIG_CMDLINE_EDITING 77 78 /* 79 * Serial driver 80 */ 81 #define CONFIG_BAUDRATE 115200 82 83 #define CONFIG_SYS_NS16550 84 #define CONFIG_SYS_NS16550_SERIAL 85 #define CONFIG_SYS_NS16550_REG_SIZE 1 86 #define CONFIG_SYS_NS16550_CLK (115200 * 16) 87 #define CONFIG_SYS_NS16550_COM1 CKSEG1ADDR(MALTA_GT_UART0_BASE) 88 #define CONFIG_SYS_NS16550_COM2 CKSEG1ADDR(MALTA_MSC01_UART0_BASE) 89 #define CONFIG_CONS_INDEX 1 90 91 /* 92 * Flash configuration 93 */ 94 #define CONFIG_SYS_FLASH_BASE (KSEG1 | MALTA_FLASH_BASE) 95 #define CONFIG_SYS_MAX_FLASH_BANKS 1 96 #define CONFIG_SYS_MAX_FLASH_SECT 128 97 #define CONFIG_SYS_FLASH_CFI 98 #define CONFIG_FLASH_CFI_DRIVER 99 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 100 101 /* 102 * Environment 103 */ 104 #define CONFIG_ENV_IS_IN_FLASH 105 #define CONFIG_ENV_SECT_SIZE 0x20000 106 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 107 #define CONFIG_ENV_ADDR \ 108 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) 109 110 /* 111 * IDE/ATA 112 */ 113 #define CONFIG_SYS_IDE_MAXBUS 1 114 #define CONFIG_SYS_IDE_MAXDEVICE 2 115 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS 116 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 117 #define CONFIG_SYS_ATA_DATA_OFFSET 0 118 #define CONFIG_SYS_ATA_REG_OFFSET 0 119 120 /* 121 * Commands 122 */ 123 #define CONFIG_CMD_DATE 124 #define CONFIG_CMD_DHCP 125 #define CONFIG_CMD_IDE 126 #define CONFIG_CMD_PCI 127 #define CONFIG_CMD_PING 128 129 #define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ 130 131 #endif /* _MALTA_CONFIG_H */ 132