1 /* 2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef _MALTA_CONFIG_H 8 #define _MALTA_CONFIG_H 9 10 /* 11 * System configuration 12 */ 13 #define CONFIG_MALTA 14 #define CONFIG_BOARD_EARLY_INIT_F 15 #define CONFIG_DISPLAY_BOARDINFO 16 17 #define CONFIG_MEMSIZE_IN_BYTES 18 19 #define CONFIG_PCI 20 #define CONFIG_PCI_GT64120 21 #define CONFIG_PCI_MSC01 22 #define CONFIG_PCI_PNP 23 #define CONFIG_PCNET 24 #define CONFIG_PCNET_79C973 25 #define PCNET_HAS_PROM 26 27 #define CONFIG_MISC_INIT_R 28 #define CONFIG_RTC_MC146818 29 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 30 31 /* 32 * CPU Configuration 33 */ 34 #define CONFIG_SYS_MHZ 250 /* arbitrary value */ 35 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) 36 37 /* 38 * Memory map 39 */ 40 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 41 42 #ifdef CONFIG_64BIT 43 # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 44 #else 45 # define CONFIG_SYS_SDRAM_BASE 0x80000000 46 #endif 47 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) 48 49 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 50 51 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000) 52 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 53 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000) 54 55 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 56 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) 57 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) 58 59 #define CONFIG_SYS_CBSIZE 256 60 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 61 sizeof(CONFIG_SYS_PROMPT) + 16) 62 #define CONFIG_SYS_MAXARGS 16 63 64 #define CONFIG_AUTO_COMPLETE 65 #define CONFIG_CMDLINE_EDITING 66 67 /* 68 * Serial driver 69 */ 70 #define CONFIG_BAUDRATE 115200 71 #define CONFIG_SYS_NS16550_PORT_MAPPED 72 73 /* 74 * Flash configuration 75 */ 76 #ifdef CONFIG_64BIT 77 # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 78 #else 79 # define CONFIG_SYS_FLASH_BASE 0xbe000000 80 #endif 81 #define CONFIG_SYS_MAX_FLASH_BANKS 1 82 #define CONFIG_SYS_MAX_FLASH_SECT 128 83 #define CONFIG_SYS_FLASH_CFI 84 #define CONFIG_FLASH_CFI_DRIVER 85 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 86 87 /* 88 * Environment 89 */ 90 #define CONFIG_ENV_IS_IN_FLASH 91 #define CONFIG_ENV_SECT_SIZE 0x20000 92 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 93 #define CONFIG_ENV_ADDR \ 94 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) 95 96 /* 97 * IDE/ATA 98 */ 99 #define CONFIG_SYS_IDE_MAXBUS 1 100 #define CONFIG_SYS_IDE_MAXDEVICE 2 101 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS 102 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 103 #define CONFIG_SYS_ATA_DATA_OFFSET 0 104 #define CONFIG_SYS_ATA_REG_OFFSET 0 105 106 /* 107 * Commands 108 */ 109 #define CONFIG_CMD_DATE 110 #define CONFIG_CMD_IDE 111 #define CONFIG_CMD_PCI 112 113 #define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ 114 115 #endif /* _MALTA_CONFIG_H */ 116