1 /* 2 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef _MALTA_CONFIG_H 8 #define _MALTA_CONFIG_H 9 10 /* 11 * System configuration 12 */ 13 #define CONFIG_MALTA 14 #define CONFIG_BOARD_EARLY_INIT_F 15 16 #define CONFIG_MEMSIZE_IN_BYTES 17 18 #define CONFIG_PCI 19 #define CONFIG_PCI_GT64120 20 #define CONFIG_PCI_MSC01 21 #define CONFIG_PCI_PNP 22 #define CONFIG_PCNET 23 #define CONFIG_PCNET_79C973 24 #define PCNET_HAS_PROM 25 26 #define CONFIG_MISC_INIT_R 27 #define CONFIG_RTC_MC146818 28 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 29 30 /* 31 * CPU Configuration 32 */ 33 #define CONFIG_SYS_MHZ 250 /* arbitrary value */ 34 #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) 35 36 /* 37 * Memory map 38 */ 39 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 40 41 #ifdef CONFIG_64BIT 42 # define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 43 #else 44 # define CONFIG_SYS_SDRAM_BASE 0x80000000 45 #endif 46 #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) 47 48 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 49 50 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x01000000) 51 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x00100000) 52 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x00800000) 53 54 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) 55 #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) 56 #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) 57 58 #define CONFIG_SYS_CBSIZE 256 59 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 60 sizeof(CONFIG_SYS_PROMPT) + 16) 61 #define CONFIG_SYS_MAXARGS 16 62 63 #define CONFIG_AUTO_COMPLETE 64 #define CONFIG_CMDLINE_EDITING 65 66 /* 67 * Serial driver 68 */ 69 #define CONFIG_BAUDRATE 115200 70 #define CONFIG_SYS_NS16550_PORT_MAPPED 71 72 /* 73 * Flash configuration 74 */ 75 #ifdef CONFIG_64BIT 76 # define CONFIG_SYS_FLASH_BASE 0xffffffffbe000000 77 #else 78 # define CONFIG_SYS_FLASH_BASE 0xbe000000 79 #endif 80 #define CONFIG_SYS_MAX_FLASH_BANKS 1 81 #define CONFIG_SYS_MAX_FLASH_SECT 128 82 #define CONFIG_SYS_FLASH_CFI 83 #define CONFIG_FLASH_CFI_DRIVER 84 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 85 86 /* 87 * Environment 88 */ 89 #define CONFIG_ENV_IS_IN_FLASH 90 #define CONFIG_ENV_SECT_SIZE 0x20000 91 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 92 #define CONFIG_ENV_ADDR \ 93 (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) 94 95 /* 96 * IDE/ATA 97 */ 98 #define CONFIG_SYS_IDE_MAXBUS 1 99 #define CONFIG_SYS_IDE_MAXDEVICE 2 100 #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS 101 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 102 #define CONFIG_SYS_ATA_DATA_OFFSET 0 103 #define CONFIG_SYS_ATA_REG_OFFSET 0 104 105 /* 106 * Commands 107 */ 108 #define CONFIG_CMD_DATE 109 #define CONFIG_CMD_IDE 110 #define CONFIG_CMD_PCI 111 112 #define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ 113 114 #endif /* _MALTA_CONFIG_H */ 115