1 /*
2  * Copyright 2016 Freescale Semiconductor
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __LS1046A_COMMON_H
8 #define __LS1046A_COMMON_H
9 
10 #define CONFIG_REMAKE_ELF
11 #define CONFIG_FSL_LAYERSCAPE
12 #define CONFIG_MP
13 #define CONFIG_GICV2
14 
15 #include <asm/arch/config.h>
16 
17 /* Link Definitions */
18 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)
19 
20 #define CONFIG_SUPPORT_RAW_INITRD
21 
22 #define CONFIG_SKIP_LOWLEVEL_INIT
23 
24 #define CONFIG_VERY_BIG_RAM
25 #define CONFIG_SYS_DDR_SDRAM_BASE	0x80000000
26 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY	0
27 #define CONFIG_SYS_SDRAM_BASE		CONFIG_SYS_DDR_SDRAM_BASE
28 #define CONFIG_SYS_DDR_BLOCK2_BASE      0x880000000ULL
29 
30 #define CPU_RELEASE_ADDR               secondary_boot_func
31 
32 /* Generic Timer Definitions */
33 #define COUNTER_FREQUENCY		25000000	/* 25MHz */
34 
35 /* Size of malloc() pool */
36 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
37 
38 /* Serial Port */
39 #define CONFIG_CONS_INDEX		1
40 #define CONFIG_SYS_NS16550_SERIAL
41 #define CONFIG_SYS_NS16550_REG_SIZE	1
42 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
43 
44 #define CONFIG_BAUDRATE			115200
45 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
46 
47 /* SD boot SPL */
48 #ifdef CONFIG_SD_BOOT
49 #define CONFIG_SPL_FRAMEWORK
50 #define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv8/u-boot-spl.lds"
51 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
52 #define CONFIG_SPL_LIBCOMMON_SUPPORT
53 #define CONFIG_SPL_LIBGENERIC_SUPPORT
54 #define CONFIG_SPL_ENV_SUPPORT
55 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
56 #define CONFIG_SPL_WATCHDOG_SUPPORT
57 #define CONFIG_SPL_I2C_SUPPORT
58 #define CONFIG_SPL_SERIAL_SUPPORT
59 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
60 
61 #define CONFIG_SPL_MMC_SUPPORT
62 #define CONFIG_SPL_TEXT_BASE		0x10000000
63 #define CONFIG_SPL_MAX_SIZE		0x1f000		/* 124 KiB */
64 #define CONFIG_SPL_STACK		0x10020000
65 #define CONFIG_SPL_PAD_TO		0x21000		/* 132 KiB */
66 #define CONFIG_SPL_BSS_START_ADDR	0x8f000000
67 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
68 #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
69 					CONFIG_SPL_BSS_MAX_SIZE)
70 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
71 #define CONFIG_SYS_MONITOR_LEN		0xa0000
72 #endif
73 
74 /* NAND SPL */
75 #ifdef CONFIG_NAND_BOOT
76 #define CONFIG_SPL_PBL_PAD
77 #define CONFIG_SPL_FRAMEWORK
78 #define CONFIG_SPL_LDSCRIPT		"arch/arm/cpu/armv8/u-boot-spl.lds"
79 #define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
80 #define CONFIG_SPL_LIBCOMMON_SUPPORT
81 #define CONFIG_SPL_LIBGENERIC_SUPPORT
82 #define CONFIG_SPL_ENV_SUPPORT
83 #define CONFIG_SPL_WATCHDOG_SUPPORT
84 #define CONFIG_SPL_I2C_SUPPORT
85 #define CONFIG_SPL_SERIAL_SUPPORT
86 #define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
87 
88 #define CONFIG_SPL_NAND_SUPPORT
89 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
90 #define CONFIG_SPL_TEXT_BASE		0x10000000
91 #define CONFIG_SPL_MAX_SIZE		0x1d000		/* 116 KiB */
92 #define CONFIG_SPL_STACK		0x1001f000
93 #define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
94 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
95 
96 #define CONFIG_SPL_BSS_START_ADDR	0x8f000000
97 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
98 #define CONFIG_SYS_SPL_MALLOC_START	(CONFIG_SPL_BSS_START_ADDR + \
99 					CONFIG_SPL_BSS_MAX_SIZE)
100 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
101 #define CONFIG_SYS_MONITOR_LEN		0xa0000
102 #endif
103 
104 /* I2C */
105 #define CONFIG_SYS_I2C
106 #define CONFIG_SYS_I2C_MXC
107 #define CONFIG_SYS_I2C_MXC_I2C1
108 #define CONFIG_SYS_I2C_MXC_I2C2
109 #define CONFIG_SYS_I2C_MXC_I2C3
110 #define CONFIG_SYS_I2C_MXC_I2C4
111 
112 /* Command line configuration */
113 #define CONFIG_CMD_ENV
114 
115 /* MMC */
116 #ifdef CONFIG_MMC
117 #define CONFIG_FSL_ESDHC
118 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
119 #endif
120 
121 #define CONFIG_FSL_CAAM			/* Enable SEC/CAAM */
122 
123 #define CONFIG_SYS_DPAA_QBMAN		/* Support Q/Bman */
124 
125 /* FMan ucode */
126 #define CONFIG_SYS_DPAA_FMAN
127 #ifdef CONFIG_SYS_DPAA_FMAN
128 #define CONFIG_SYS_FM_MURAM_SIZE	0x60000
129 
130 #ifdef CONFIG_SD_BOOT
131 /*
132  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
133  * about 1MB (2048 blocks), Env is stored after the image, and the env size is
134  * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080(0x820).
135  */
136 #define CONFIG_SYS_QE_FMAN_FW_IN_MMC
137 #define CONFIG_SYS_FMAN_FW_ADDR		(512 * 0x820)
138 #elif defined(CONFIG_QSPI_BOOT)
139 #define CONFIG_SYS_QE_FW_IN_SPIFLASH
140 #define CONFIG_SYS_FMAN_FW_ADDR		0x40300000
141 #define CONFIG_ENV_SPI_BUS		0
142 #define CONFIG_ENV_SPI_CS		0
143 #define CONFIG_ENV_SPI_MAX_HZ		1000000
144 #define CONFIG_ENV_SPI_MODE		0x03
145 #elif defined(CONFIG_NAND_BOOT)
146 #define CONFIG_SYS_QE_FMAN_FW_IN_NAND
147 #define CONFIG_SYS_FMAN_FW_ADDR		(6 * CONFIG_SYS_NAND_BLOCK_SIZE)
148 #else
149 #define CONFIG_SYS_QE_FMAN_FW_IN_NOR
150 #define CONFIG_SYS_FMAN_FW_ADDR		0x60300000
151 #endif
152 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
153 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
154 #endif
155 
156 /* Miscellaneous configurable options */
157 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
158 
159 #define CONFIG_HWCONFIG
160 #define HWCONFIG_BUFFER_SIZE		128
161 
162 /* Initial environment variables */
163 #define CONFIG_EXTRA_ENV_SETTINGS		\
164 	"hwconfig=fsl_ddr:bank_intlv=auto\0"	\
165 	"loadaddr=0x80100000\0"			\
166 	"ramdisk_addr=0x800000\0"		\
167 	"ramdisk_size=0x2000000\0"		\
168 	"fdt_high=0xffffffffffffffff\0"		\
169 	"initrd_high=0xffffffffffffffff\0"	\
170 	"kernel_start=0x1000000\0"		\
171 	"kernel_load=0xa0000000\0"		\
172 	"kernel_size=0x2800000\0"		\
173 	"console=ttyS0,115200\0"                \
174 		MTDPARTS_DEFAULT "\0"
175 
176 #define CONFIG_BOOTARGS			"console=ttyS0,115200 root=/dev/ram0 " \
177 					"earlycon=uart8250,mmio,0x21c0500 " \
178 					MTDPARTS_DEFAULT
179 /* Monitor Command Prompt */
180 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
181 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
182 					sizeof(CONFIG_SYS_PROMPT) + 16)
183 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE /* Boot args buffer */
184 #define CONFIG_SYS_LONGHELP
185 #define CONFIG_CMDLINE_EDITING		1
186 #define CONFIG_AUTO_COMPLETE
187 #define CONFIG_SYS_MAXARGS		64	/* max command args */
188 
189 #define CONFIG_SYS_BOOTM_LEN   (64 << 20)      /* Increase max gunzip size */
190 
191 /* Hash command with SHA acceleration supported in hardware */
192 #ifdef CONFIG_FSL_CAAM
193 #define CONFIG_CMD_HASH
194 #define CONFIG_SHA_HW_ACCEL
195 #endif
196 
197 #endif /* __LS1046A_COMMON_H */
198