1 /* 2 * Copyright 2016 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __LS1012ARDB_H__ 8 #define __LS1012ARDB_H__ 9 10 #include "ls1012a_common.h" 11 12 /* DDR */ 13 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 14 #define CONFIG_CHIP_SELECTS_PER_CTRL 1 15 #define CONFIG_NR_DRAM_BANKS 2 16 #define CONFIG_SYS_SDRAM_SIZE 0x40000000 17 #define CONFIG_CMD_MEMINFO 18 #define CONFIG_CMD_MEMTEST 19 #define CONFIG_SYS_MEMTEST_START 0x80000000 20 #define CONFIG_SYS_MEMTEST_END 0x9fffffff 21 22 23 /* 24 * I2C IO expander 25 */ 26 27 #define I2C_MUX_IO_ADDR 0x24 28 #define I2C_MUX_IO2_ADDR 0x25 29 #define I2C_MUX_IO_0 0 30 #define I2C_MUX_IO_1 1 31 #define SW_BOOT_MASK 0x03 32 #define SW_BOOT_EMU 0x02 33 #define SW_BOOT_BANK1 0x00 34 #define SW_BOOT_BANK2 0x01 35 #define SW_REV_MASK 0xF8 36 #define SW_REV_A 0xF8 37 #define SW_REV_B 0xF0 38 #define SW_REV_C 0xE8 39 #define SW_REV_C1 0xE0 40 #define SW_REV_C2 0xD8 41 #define SW_REV_D 0xD0 42 #define SW_REV_E 0xC8 43 #define __PHY_MASK 0xF9 44 #define __PHY_ETH2_MASK 0xFB 45 #define __PHY_ETH1_MASK 0xFD 46 47 /* MMC */ 48 #ifdef CONFIG_MMC 49 #define CONFIG_FSL_ESDHC 50 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 51 #endif 52 53 54 #define CONFIG_PCIE1 /* PCIE controller 1 */ 55 56 #define CONFIG_PCI_SCAN_SHOW 57 58 #define CONFIG_CMD_MEMINFO 59 #define CONFIG_CMD_MEMTEST 60 #define CONFIG_SYS_MEMTEST_START 0x80000000 61 #define CONFIG_SYS_MEMTEST_END 0x9fffffff 62 63 #undef CONFIG_EXTRA_ENV_SETTINGS 64 #define CONFIG_EXTRA_ENV_SETTINGS \ 65 "verify=no\0" \ 66 "fdt_high=0xffffffffffffffff\0" \ 67 "initrd_high=0xffffffffffffffff\0" \ 68 "fdt_addr=0x00f00000\0" \ 69 "kernel_addr=0x01000000\0" \ 70 "kernelheader_addr=0x800000\0" \ 71 "scriptaddr=0x80000000\0" \ 72 "scripthdraddr=0x80080000\0" \ 73 "fdtheader_addr_r=0x80100000\0" \ 74 "kernelheader_addr_r=0x80200000\0" \ 75 "kernel_addr_r=0x81000000\0" \ 76 "fdt_addr_r=0x90000000\0" \ 77 "load_addr=0xa0000000\0" \ 78 "kernel_size=0x2800000\0" \ 79 "kernelheader_size=0x40000\0" \ 80 "console=ttyS0,115200\0" \ 81 BOOTENV \ 82 "boot_scripts=ls1012ardb_boot.scr\0" \ 83 "boot_script_hdr=hdr_ls1012ardb_bs.out\0" \ 84 "scan_dev_for_boot_part=" \ 85 "part list ${devtype} ${devnum} devplist; " \ 86 "env exists devplist || setenv devplist 1; " \ 87 "for distro_bootpart in ${devplist}; do " \ 88 "if fstype ${devtype} " \ 89 "${devnum}:${distro_bootpart} " \ 90 "bootfstype; then " \ 91 "run scan_dev_for_boot; " \ 92 "fi; " \ 93 "done\0" \ 94 "scan_dev_for_boot=" \ 95 "echo Scanning ${devtype} " \ 96 "${devnum}:${distro_bootpart}...; " \ 97 "for prefix in ${boot_prefixes}; do " \ 98 "run scan_dev_for_scripts; " \ 99 "done;" \ 100 "\0" \ 101 "boot_a_script=" \ 102 "load ${devtype} ${devnum}:${distro_bootpart} " \ 103 "${scriptaddr} ${prefix}${script}; " \ 104 "env exists secureboot && load ${devtype} " \ 105 "${devnum}:${distro_bootpart} " \ 106 "${scripthdraddr} ${prefix}${boot_script_hdr} " \ 107 "&& esbc_validate ${scripthdraddr};" \ 108 "source ${scriptaddr}\0" \ 109 "installer=load mmc 0:2 $load_addr " \ 110 "/flex_installer_arm64.itb; " \ 111 "bootm $load_addr#$board\0" \ 112 "qspi_bootcmd=echo Trying load from qspi..;" \ 113 "sf probe && sf read $load_addr " \ 114 "$kernel_addr $kernel_size; env exists secureboot " \ 115 "&& sf read $kernelheader_addr_r $kernelheader_addr " \ 116 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ 117 "bootm $load_addr#$board\0" 118 119 #undef CONFIG_BOOTCOMMAND 120 #define CONFIG_BOOTCOMMAND "pfe stop; run distro_bootcmd; run qspi_bootcmd; "\ 121 "env exists secureboot && esbc_halt;" 122 123 #include <asm/fsl_secure_boot.h> 124 125 #endif /* __LS1012ARDB_H__ */ 126