xref: /openbmc/u-boot/include/configs/ls1012ardb.h (revision d7c11502)
1 /*
2  * Copyright 2016 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __LS1012ARDB_H__
8 #define __LS1012ARDB_H__
9 
10 #include "ls1012a_common.h"
11 
12 /* DDR */
13 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
14 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
15 #define CONFIG_NR_DRAM_BANKS		2
16 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
17 #define CONFIG_CMD_MEMINFO
18 #define CONFIG_CMD_MEMTEST
19 #define CONFIG_SYS_MEMTEST_START	0x80000000
20 #define CONFIG_SYS_MEMTEST_END		0x9fffffff
21 
22 /*
23 * USB
24 */
25 #define CONFIG_HAS_FSL_XHCI_USB
26 
27 #ifdef CONFIG_HAS_FSL_XHCI_USB
28 #define CONFIG_USB_XHCI_FSL
29 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
30 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
31 #endif
32 
33 /*
34  * I2C IO expander
35  */
36 
37 #define I2C_MUX_IO1_ADDR	0x24
38 #define __SW_BOOT_MASK		0xFC
39 #define __SW_BOOT_EMU		0x10
40 #define __SW_BOOT_BANK1		0x00
41 #define __SW_BOOT_BANK2		0x01
42 #define __SW_REV_MASK		0x07
43 #define __SW_REV_A		0xF8
44 #define __SW_REV_B		0xF0
45 
46 /*  MMC  */
47 #ifdef CONFIG_MMC
48 #define CONFIG_FSL_ESDHC
49 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
50 #endif
51 
52 /* SATA */
53 #define CONFIG_LIBATA
54 #define CONFIG_SCSI_AHCI
55 #define CONFIG_SCSI_AHCI_PLAT
56 #define CONFIG_CMD_SCSI
57 
58 #define CONFIG_SYS_SATA				AHCI_BASE_ADDR
59 
60 #define CONFIG_SYS_SCSI_MAX_SCSI_ID		1
61 #define CONFIG_SYS_SCSI_MAX_LUN			1
62 #define CONFIG_SYS_SCSI_MAX_DEVICE		(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
63 						CONFIG_SYS_SCSI_MAX_LUN)
64 
65 #define CONFIG_PCIE1		/* PCIE controller 1 */
66 
67 #define CONFIG_NET_MULTI
68 #define CONFIG_PCI_SCAN_SHOW
69 #define CONFIG_CMD_PCI
70 
71 #define CONFIG_CMD_MEMINFO
72 #define CONFIG_CMD_MEMTEST
73 #define CONFIG_SYS_MEMTEST_START	0x80000000
74 #define CONFIG_SYS_MEMTEST_END		0x9fffffff
75 
76 
77 #include <asm/fsl_secure_boot.h>
78 
79 #endif /* __LS1012ARDB_H__ */
80