13b6e3898SPrabhakar Kushwaha /* 23b6e3898SPrabhakar Kushwaha * Copyright 2016 Freescale Semiconductor, Inc. 33b6e3898SPrabhakar Kushwaha * 43b6e3898SPrabhakar Kushwaha * SPDX-License-Identifier: GPL-2.0+ 53b6e3898SPrabhakar Kushwaha */ 63b6e3898SPrabhakar Kushwaha 73b6e3898SPrabhakar Kushwaha #ifndef __LS1012ARDB_H__ 83b6e3898SPrabhakar Kushwaha #define __LS1012ARDB_H__ 93b6e3898SPrabhakar Kushwaha 103b6e3898SPrabhakar Kushwaha #include "ls1012a_common.h" 113b6e3898SPrabhakar Kushwaha 12*b9e745bbSShengzhou Liu /* DDR */ 133b6e3898SPrabhakar Kushwaha #define CONFIG_DIMM_SLOTS_PER_CTLR 1 143b6e3898SPrabhakar Kushwaha #define CONFIG_CHIP_SELECTS_PER_CTRL 1 153b6e3898SPrabhakar Kushwaha #define CONFIG_NR_DRAM_BANKS 2 163b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SDRAM_SIZE 0x40000000 173b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_MEMINFO 183b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_MEMTEST 193b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_START 0x80000000 203b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_END 0x9fffffff 213b6e3898SPrabhakar Kushwaha 22*b9e745bbSShengzhou Liu /* DDR board-specific timing parameters */ 23*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDCTL 0x05180000 24*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDPDC 0x00030035 25*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDOTC 0x12554000 26*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDCFG0 0xbabf7954 27*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDCFG1 0xdb328f64 28*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDCFG2 0x01ff00db 29*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDMISC 0x00001680 30*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDREF 0x0f3c8000 31*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDRWD 0x00002000 32*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDOR 0x00bf1023 33*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MDASP 0x0000003f 34*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MPODTCTRL 0x0000022a 35*b9e745bbSShengzhou Liu #define CONFIG_MMDC_MPZQHWCTRL 0xa1390003 36*b9e745bbSShengzhou Liu 373b6e3898SPrabhakar Kushwaha /* 383b6e3898SPrabhakar Kushwaha * USB 393b6e3898SPrabhakar Kushwaha */ 403b6e3898SPrabhakar Kushwaha #define CONFIG_HAS_FSL_XHCI_USB 413b6e3898SPrabhakar Kushwaha 423b6e3898SPrabhakar Kushwaha #ifdef CONFIG_HAS_FSL_XHCI_USB 433b6e3898SPrabhakar Kushwaha #define CONFIG_USB_XHCI_FSL 443b6e3898SPrabhakar Kushwaha #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 453b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 463b6e3898SPrabhakar Kushwaha #endif 473b6e3898SPrabhakar Kushwaha 483b6e3898SPrabhakar Kushwaha /* 493b6e3898SPrabhakar Kushwaha * I2C IO expander 503b6e3898SPrabhakar Kushwaha */ 513b6e3898SPrabhakar Kushwaha 523b6e3898SPrabhakar Kushwaha #define I2C_MUX_IO1_ADDR 0x24 533b6e3898SPrabhakar Kushwaha #define __SW_BOOT_MASK 0xFC 543b6e3898SPrabhakar Kushwaha #define __SW_BOOT_EMU 0x10 553b6e3898SPrabhakar Kushwaha #define __SW_BOOT_BANK1 0x00 563b6e3898SPrabhakar Kushwaha #define __SW_BOOT_BANK2 0x01 573b6e3898SPrabhakar Kushwaha #define __SW_REV_MASK 0x07 583b6e3898SPrabhakar Kushwaha #define __SW_REV_A 0xF8 593b6e3898SPrabhakar Kushwaha #define __SW_REV_B 0xF0 603b6e3898SPrabhakar Kushwaha 613b6e3898SPrabhakar Kushwaha /* MMC */ 623b6e3898SPrabhakar Kushwaha #define CONFIG_MMC 633b6e3898SPrabhakar Kushwaha #ifdef CONFIG_MMC 643b6e3898SPrabhakar Kushwaha #define CONFIG_FSL_ESDHC 653b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 663b6e3898SPrabhakar Kushwaha #define CONFIG_GENERIC_MMC 673b6e3898SPrabhakar Kushwaha #define CONFIG_DOS_PARTITION 683b6e3898SPrabhakar Kushwaha #endif 693b6e3898SPrabhakar Kushwaha 703b6e3898SPrabhakar Kushwaha /* SATA */ 713b6e3898SPrabhakar Kushwaha #define CONFIG_LIBATA 723b6e3898SPrabhakar Kushwaha #define CONFIG_SCSI 733b6e3898SPrabhakar Kushwaha #define CONFIG_SCSI_AHCI 743b6e3898SPrabhakar Kushwaha #define CONFIG_SCSI_AHCI_PLAT 753b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_SCSI 763b6e3898SPrabhakar Kushwaha #define CONFIG_DOS_PARTITION 773b6e3898SPrabhakar Kushwaha #define CONFIG_BOARD_LATE_INIT 783b6e3898SPrabhakar Kushwaha 793b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SATA AHCI_BASE_ADDR 803b6e3898SPrabhakar Kushwaha 813b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 823b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SCSI_MAX_LUN 1 833b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 843b6e3898SPrabhakar Kushwaha CONFIG_SYS_SCSI_MAX_LUN) 853b6e3898SPrabhakar Kushwaha #define CONFIG_PCI /* Enable PCI/PCIE */ 863b6e3898SPrabhakar Kushwaha #define CONFIG_PCIE1 /* PCIE controller 1 */ 873b6e3898SPrabhakar Kushwaha #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */ 883b6e3898SPrabhakar Kushwaha #define FSL_PCIE_COMPAT "fsl,ls1043a-pcie" 893b6e3898SPrabhakar Kushwaha 903b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCI_64BIT 913b6e3898SPrabhakar Kushwaha 923b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000 933b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */ 943b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000 953b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */ 963b6e3898SPrabhakar Kushwaha 973b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_IO_BUS 0x00000000 983b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000 993b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */ 1003b6e3898SPrabhakar Kushwaha 1013b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_MEM_BUS 0x08000000 1023b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000 1033b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */ 1043b6e3898SPrabhakar Kushwaha 1053b6e3898SPrabhakar Kushwaha #define CONFIG_NET_MULTI 1063b6e3898SPrabhakar Kushwaha #define CONFIG_PCI_PNP 1073b6e3898SPrabhakar Kushwaha #define CONFIG_PCI_SCAN_SHOW 1083b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_PCI 1093b6e3898SPrabhakar Kushwaha 1103b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_MEMINFO 1113b6e3898SPrabhakar Kushwaha #define CONFIG_CMD_MEMTEST 1123b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_START 0x80000000 1133b6e3898SPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_END 0x9fffffff 1143b6e3898SPrabhakar Kushwaha 1153b6e3898SPrabhakar Kushwaha #endif /* __LS1012ARDB_H__ */ 116