1 /*
2  * Copyright 2016 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __LS1012ARDB_H__
8 #define __LS1012ARDB_H__
9 
10 #include "ls1012a_common.h"
11 
12 /* DDR */
13 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
14 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
15 #define CONFIG_NR_DRAM_BANKS		2
16 #define CONFIG_SYS_SDRAM_SIZE		0x20000000
17 #define CONFIG_CHIP_SELECTS_PER_CTRL	1
18 #define CONFIG_CMD_MEMINFO
19 #define CONFIG_CMD_MEMTEST
20 #define CONFIG_SYS_MEMTEST_START	0x80000000
21 #define CONFIG_SYS_MEMTEST_END		0x9fffffff
22 
23 #undef CONFIG_EXTRA_ENV_SETTINGS
24 #define CONFIG_EXTRA_ENV_SETTINGS              \
25        "verify=no\0"                           \
26        "loadaddr=0x80100000\0"                 \
27        "kernel_addr=0x100000\0"                \
28        "fdt_high=0xffffffffffffffff\0"         \
29        "initrd_high=0xffffffffffffffff\0"      \
30        "kernel_start=0xa00000\0"               \
31        "kernel_load=0x96000000\0"              \
32        "kernel_size=0x2800000\0"
33 
34 /*
35 * USB
36 */
37 #define CONFIG_HAS_FSL_XHCI_USB
38 
39 #ifdef CONFIG_HAS_FSL_XHCI_USB
40 #define CONFIG_USB_XHCI_FSL
41 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
42 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
43 #endif
44 
45 #define CONFIG_CMD_MEMINFO
46 #define CONFIG_CMD_MEMTEST
47 #define CONFIG_SYS_MEMTEST_START	0x80000000
48 #define CONFIG_SYS_MEMTEST_END		0x9fffffff
49 
50 #endif /* __LS1012ARDB_H__ */
51