1ff78aa2bSPrabhakar Kushwaha /* 2ff78aa2bSPrabhakar Kushwaha * Copyright 2016 Freescale Semiconductor, Inc. 3ff78aa2bSPrabhakar Kushwaha * 4ff78aa2bSPrabhakar Kushwaha * SPDX-License-Identifier: GPL-2.0+ 5ff78aa2bSPrabhakar Kushwaha */ 6ff78aa2bSPrabhakar Kushwaha 7ff78aa2bSPrabhakar Kushwaha #ifndef __LS1012ARDB_H__ 8ff78aa2bSPrabhakar Kushwaha #define __LS1012ARDB_H__ 9ff78aa2bSPrabhakar Kushwaha 10ff78aa2bSPrabhakar Kushwaha #include "ls1012a_common.h" 11ff78aa2bSPrabhakar Kushwaha 12b9e745bbSShengzhou Liu /* DDR */ 13ff78aa2bSPrabhakar Kushwaha #define CONFIG_DIMM_SLOTS_PER_CTLR 1 14ff78aa2bSPrabhakar Kushwaha #define CONFIG_CHIP_SELECTS_PER_CTRL 1 15ff78aa2bSPrabhakar Kushwaha #define CONFIG_NR_DRAM_BANKS 2 16ff78aa2bSPrabhakar Kushwaha #define CONFIG_SYS_SDRAM_SIZE 0x20000000 17b9e745bbSShengzhou Liu #define CONFIG_CHIP_SELECTS_PER_CTRL 1 18ff78aa2bSPrabhakar Kushwaha #define CONFIG_CMD_MEMINFO 19ff78aa2bSPrabhakar Kushwaha #define CONFIG_CMD_MEMTEST 20ff78aa2bSPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_START 0x80000000 21ff78aa2bSPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_END 0x9fffffff 22ff78aa2bSPrabhakar Kushwaha 23*76379dfbSPratiyush Srivastava #undef CONFIG_EXTRA_ENV_SETTINGS 24*76379dfbSPratiyush Srivastava #define CONFIG_EXTRA_ENV_SETTINGS \ 25*76379dfbSPratiyush Srivastava "verify=no\0" \ 26*76379dfbSPratiyush Srivastava "loadaddr=0x80100000\0" \ 27*76379dfbSPratiyush Srivastava "kernel_addr=0x100000\0" \ 28*76379dfbSPratiyush Srivastava "fdt_high=0xffffffffffffffff\0" \ 29*76379dfbSPratiyush Srivastava "initrd_high=0xffffffffffffffff\0" \ 30*76379dfbSPratiyush Srivastava "kernel_start=0xa00000\0" \ 31*76379dfbSPratiyush Srivastava "kernel_load=0x96000000\0" \ 32*76379dfbSPratiyush Srivastava "kernel_size=0x2800000\0" 33*76379dfbSPratiyush Srivastava 34ff78aa2bSPrabhakar Kushwaha /* 35ff78aa2bSPrabhakar Kushwaha * USB 36ff78aa2bSPrabhakar Kushwaha */ 37ff78aa2bSPrabhakar Kushwaha #define CONFIG_HAS_FSL_XHCI_USB 38ff78aa2bSPrabhakar Kushwaha 39ff78aa2bSPrabhakar Kushwaha #ifdef CONFIG_HAS_FSL_XHCI_USB 40ff78aa2bSPrabhakar Kushwaha #define CONFIG_USB_XHCI_FSL 41ff78aa2bSPrabhakar Kushwaha #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 42ff78aa2bSPrabhakar Kushwaha #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 43ff78aa2bSPrabhakar Kushwaha #endif 44ff78aa2bSPrabhakar Kushwaha 45ff78aa2bSPrabhakar Kushwaha #define CONFIG_CMD_MEMINFO 46ff78aa2bSPrabhakar Kushwaha #define CONFIG_CMD_MEMTEST 47ff78aa2bSPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_START 0x80000000 48ff78aa2bSPrabhakar Kushwaha #define CONFIG_SYS_MEMTEST_END 0x9fffffff 49ff78aa2bSPrabhakar Kushwaha 50ff78aa2bSPrabhakar Kushwaha #endif /* __LS1012ARDB_H__ */ 51