1 /* 2 * Copyright 2016 Freescale Semiconductor 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __LS1012A_COMMON_H 8 #define __LS1012A_COMMON_H 9 10 #define CONFIG_FSL_LAYERSCAPE 11 #define CONFIG_GICV2 12 13 #include <asm/arch/config.h> 14 #include <asm/arch/stream_id_lsch2.h> 15 16 #define CONFIG_SYS_CLK_FREQ 125000000 17 18 #define CONFIG_SKIP_LOWLEVEL_INIT 19 20 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0) 21 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000) 22 23 #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 24 #define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 25 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE 26 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL 27 28 /* Generic Timer Definitions */ 29 #define COUNTER_FREQUENCY 25000000 /* 25MHz */ 30 31 /* CSU */ 32 #define CONFIG_LAYERSCAPE_NS_ACCESS 33 34 /* Size of malloc() pool */ 35 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 36 37 /*SPI device */ 38 #ifdef CONFIG_QSPI_BOOT 39 #define CONFIG_SYS_QE_FW_IN_SPIFLASH 40 #define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000 41 #define CONFIG_ENV_SPI_BUS 0 42 #define CONFIG_ENV_SPI_CS 0 43 #define CONFIG_ENV_SPI_MAX_HZ 1000000 44 #define CONFIG_ENV_SPI_MODE 0x03 45 #define CONFIG_SPI_FLASH_SPANSION 46 #define CONFIG_FSL_SPI_INTERFACE 47 #define CONFIG_SF_DATAFLASH 48 49 #define CONFIG_FSL_QSPI 50 #define QSPI0_AMBA_BASE 0x40000000 51 #define CONFIG_SPI_FLASH_SPANSION 52 53 #define FSL_QSPI_FLASH_SIZE SZ_64M 54 #define FSL_QSPI_FLASH_NUM 2 55 56 /* 57 * Environment 58 */ 59 #define CONFIG_ENV_OVERWRITE 60 61 #define CONFIG_ENV_SIZE 0x40000 /* 256KB */ 62 #define CONFIG_ENV_OFFSET 0x300000 /* 3MB */ 63 #define CONFIG_ENV_SECT_SIZE 0x40000 64 #endif 65 66 /* SATA */ 67 #define CONFIG_SCSI_AHCI_PLAT 68 69 #define CONFIG_SYS_SATA AHCI_BASE_ADDR 70 71 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 72 #define CONFIG_SYS_SCSI_MAX_LUN 1 73 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 74 CONFIG_SYS_SCSI_MAX_LUN) 75 76 /* I2C */ 77 #define CONFIG_SYS_I2C 78 #define CONFIG_SYS_I2C_MXC 79 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 80 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 81 82 #define CONFIG_SYS_NS16550_SERIAL 83 #define CONFIG_SYS_NS16550_REG_SIZE 1 84 #define CONFIG_SYS_NS16550_CLK (get_serial_clock()) 85 86 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } 87 88 #define CONFIG_SYS_HZ 1000 89 90 #define CONFIG_HWCONFIG 91 #define HWCONFIG_BUFFER_SIZE 128 92 93 #ifndef CONFIG_SPL_BUILD 94 #define BOOT_TARGET_DEVICES(func) \ 95 func(SCSI, scsi, 0) \ 96 func(MMC, mmc, 0) \ 97 func(USB, usb, 0) 98 #include <config_distro_bootcmd.h> 99 #endif 100 101 /* Initial environment variables */ 102 #define CONFIG_EXTRA_ENV_SETTINGS \ 103 "verify=no\0" \ 104 "loadaddr=0x80100000\0" \ 105 "kernel_addr=0x100000\0" \ 106 "fdt_high=0xffffffffffffffff\0" \ 107 "initrd_high=0xffffffffffffffff\0" \ 108 "kernel_start=0x1000000\0" \ 109 "kernel_load=0xa0000000\0" \ 110 "kernel_size=0x2800000\0" \ 111 112 #undef CONFIG_BOOTCOMMAND 113 #define CONFIG_BOOTCOMMAND "pfe stop; sf probe 0:0; sf read $kernel_load "\ 114 "$kernel_start $kernel_size && "\ 115 "bootm $kernel_load" 116 117 /* Monitor Command Prompt */ 118 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ 119 #define CONFIG_SYS_MAXARGS 64 /* max command args */ 120 121 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ 122 123 #include <asm/arch/soc.h> 124 125 #endif /* __LS1012A_COMMON_H */ 126