1 /* 2 * include/configs/lager.h 3 * This file is lager board configuration. 4 * 5 * Copyright (C) 2013, 2014 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __LAGER_H 11 #define __LAGER_H 12 13 #undef DEBUG 14 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Lager" 15 16 #include "rcar-gen2-common.h" 17 18 #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 19 #define STACK_AREA_SIZE 0x00100000 20 #define LOW_LEVEL_MERAM_STACK \ 21 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 22 23 /* MEMORY */ 24 #define RCAR_GEN2_SDRAM_BASE 0x40000000 25 #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) 26 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 27 28 /* SCIF */ 29 30 /* FLASH */ 31 #define CONFIG_SPI 32 33 /* SH Ether */ 34 #define CONFIG_SH_ETHER_USE_PORT 0 35 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 36 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 37 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 38 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 39 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 40 #define CONFIG_BITBANGMII 41 #define CONFIG_BITBANGMII_MULTI 42 43 /* Board Clock */ 44 #define RMOBILE_XTAL_CLK 20000000u 45 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 46 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 47 48 #define CONFIG_SYS_TMU_CLK_DIV 4 49 50 #define CONFIG_EXTRA_ENV_SETTINGS \ 51 "fdt_high=0xffffffff\0" \ 52 "initrd_high=0xffffffff\0" 53 54 /* SPL support */ 55 #define CONFIG_SPL_TEXT_BASE 0xe6300000 56 #define CONFIG_SPL_STACK 0xe6340000 57 #define CONFIG_SPL_MAX_SIZE 0x4000 58 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 59 #ifdef CONFIG_SPL_BUILD 60 #define CONFIG_CONS_SCIF0 61 #define CONFIG_SH_SCIF_CLK_FREQ 65000000 62 #endif 63 64 #endif /* __LAGER_H */ 65