1 /* 2 * include/configs/lager.h 3 * This file is lager board configuration. 4 * 5 * Copyright (C) 2013, 2014 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __LAGER_H 11 #define __LAGER_H 12 13 #include "rcar-gen2-common.h" 14 15 #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 16 #define STACK_AREA_SIZE 0x00100000 17 #define LOW_LEVEL_MERAM_STACK \ 18 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 19 20 /* MEMORY */ 21 #define RCAR_GEN2_SDRAM_BASE 0x40000000 22 #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) 23 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 24 25 /* SH Ether */ 26 #define CONFIG_SH_ETHER_USE_PORT 0 27 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 28 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 29 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 30 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 31 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 32 #define CONFIG_BITBANGMII 33 #define CONFIG_BITBANGMII_MULTI 34 35 /* Board Clock */ 36 #define RMOBILE_XTAL_CLK 20000000u 37 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 38 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 39 40 #define CONFIG_SYS_TMU_CLK_DIV 4 41 42 #define CONFIG_EXTRA_ENV_SETTINGS \ 43 "fdt_high=0xffffffff\0" \ 44 "initrd_high=0xffffffff\0" 45 46 /* SPL support */ 47 #define CONFIG_SPL_TEXT_BASE 0xe6300000 48 #define CONFIG_SPL_STACK 0xe6340000 49 #define CONFIG_SPL_MAX_SIZE 0x4000 50 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 51 #ifdef CONFIG_SPL_BUILD 52 #define CONFIG_CONS_SCIF0 53 #define CONFIG_SH_SCIF_CLK_FREQ 65000000 54 #endif 55 56 #endif /* __LAGER_H */ 57