1 /* 2 * include/configs/lager.h 3 * This file is lager board configuration. 4 * 5 * Copyright (C) 2013 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __LAGER_H 11 #define __LAGER_H 12 13 #undef DEBUG 14 #define CONFIG_ARMV7 15 #define CONFIG_R8A7790 16 #define CONFIG_RMOBILE 17 #define CONFIG_RMOBILE_BOARD_STRING "Lager" 18 #define CONFIG_SH_GPIO_PFC 19 #define MACH_TYPE_LAGER 4538 20 #define CONFIG_MACH_TYPE MACH_TYPE_LAGER 21 22 #include <asm/arch/rmobile.h> 23 24 #define CONFIG_CMD_EDITENV 25 #define CONFIG_CMD_SAVEENV 26 #define CONFIG_CMD_MEMORY 27 #define CONFIG_CMD_DFL 28 #define CONFIG_CMD_SDRAM 29 #define CONFIG_CMD_RUN 30 #define CONFIG_CMD_LOADS 31 #define CONFIG_CMD_NET 32 #define CONFIG_CMD_MII 33 #define CONFIG_CMD_PING 34 #define CONFIG_CMD_DHCP 35 #define CONFIG_CMD_NFS 36 #define CONFIG_CMD_BOOTZ 37 #define CONFIG_CMD_FLASH 38 39 #define CONFIG_CMDLINE_TAG 40 #define CONFIG_SETUP_MEMORY_TAGS 41 #define CONFIG_INITRD_TAG 42 #define CONFIG_CMDLINE_EDITING 43 #define CONFIG_OF_LIBFDT 44 45 /* #define CONFIG_OF_LIBFDT */ 46 #define BOARD_LATE_INIT 47 48 #define CONFIG_BAUDRATE 38400 49 #define CONFIG_BOOTDELAY 3 50 #define CONFIG_BOOTARGS "" 51 52 #define CONFIG_VERSION_VARIABLE 53 #undef CONFIG_SHOW_BOOT_PROGRESS 54 55 #define CONFIG_ARCH_CPU_INIT 56 #define CONFIG_DISPLAY_CPUINFO 57 #define CONFIG_DISPLAY_BOARDINFO 58 #define CONFIG_BOARD_EARLY_INIT_F 59 #define CONFIG_USE_ARCH_MEMSET 60 #define CONFIG_USE_ARCH_MEMCPY 61 #define CONFIG_TMU_TIMER 62 63 /* STACK */ 64 #define CONFIG_SYS_INIT_SP_ADDR 0xE827fffc 65 #define STACK_AREA_SIZE 0xC000 66 #define LOW_LEVEL_MERAM_STACK \ 67 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 68 69 /* MEMORY */ 70 #define LAGER_SDRAM_BASE 0x40000000 71 #define LAGER_SDRAM_SIZE (2048u * 1024 * 1024) 72 #define LAGER_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 73 74 #define CONFIG_SYS_LONGHELP 75 #define CONFIG_SYS_CBSIZE 256 76 #define CONFIG_SYS_PBSIZE 256 77 #define CONFIG_SYS_MAXARGS 16 78 #define CONFIG_SYS_BARGSIZE 512 79 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } 80 81 /* SCIF */ 82 #define CONFIG_SCIF_CONSOLE 83 #define CONFIG_CONS_SCIF0 84 #define SCIF0_BASE 0xe6e60000 85 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 86 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 87 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 88 89 #define CONFIG_SYS_MEMTEST_START (LAGER_SDRAM_BASE) 90 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 91 504 * 1024 * 1024) 92 #undef CONFIG_SYS_ALT_MEMTEST 93 #undef CONFIG_SYS_MEMTEST_SCRATCH 94 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 95 96 #define CONFIG_SYS_SDRAM_BASE (LAGER_SDRAM_BASE) 97 #define CONFIG_SYS_SDRAM_SIZE (LAGER_UBOOT_SDRAM_SIZE) 98 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0) 99 #define CONFIG_NR_DRAM_BANKS 1 100 101 #define CONFIG_SYS_MONITOR_BASE 0x00000000 102 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 103 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 104 #define CONFIG_SYS_GBL_DATA_SIZE (256) 105 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 106 107 /* USE NOR FLASH */ 108 #define CONFIG_SYS_TEXT_BASE 0x00000000 109 #define CONFIG_SYS_FLASH_CFI 110 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 111 #define CONFIG_FLASH_CFI_DRIVER 112 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 113 #define CONFIG_FLASH_SHOW_PROGRESS 45 114 #define CONFIG_SYS_FLASH_BASE 0x00000000 115 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */ 116 #define CONFIG_SYS_MAX_FLASH_SECT 1024 117 #define CONFIG_SYS_MAX_FLASH_BANKS 1 118 #define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) } 119 #define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) } 120 #define CONFIG_SYS_FLASH_ERASE_TOUT 3000 121 #define CONFIG_SYS_FLASH_WRITE_TOUT 3000 122 #define CONFIG_SYS_FLASH_LOCK_TOUT 3000 123 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000 124 125 /* ENV setting */ 126 #define CONFIG_ENV_IS_IN_FLASH 127 #define CONFIG_ENV_OVERWRITE 1 128 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 129 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + \ 130 CONFIG_SYS_MONITOR_LEN) 131 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 132 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 133 #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) 134 135 /* SH Ether */ 136 #define CONFIG_NET_MULTI 137 #define CONFIG_SH_ETHER 138 #define CONFIG_SH_ETHER_USE_PORT 0 139 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 140 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 141 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 142 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 143 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 144 #define CONFIG_PHYLIB 145 #define CONFIG_PHY_MICREL 146 #define CONFIG_BITBANGMII 147 #define CONFIG_BITBANGMII_MULTI 148 149 /* I2C */ 150 #define CONFIG_SYS_I2C 151 #define CONFIG_SYS_I2C_RCAR 152 #define CONFIG_SYS_RCAR_I2C0_BASE 0xE6508000 153 #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 154 #define CONFIG_SYS_RCAR_I2C1_BASE 0xE6518000 155 #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 156 #define CONFIG_SYS_RCAR_I2C2_BASE 0xE6530000 157 #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 158 #define CONFIG_SYS_RCAR_I2C3_BASE 0xE6540000 159 #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 160 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 161 162 /* Board Clock */ 163 #define CONFIG_BASE_CLK_FREQ 20000000u 164 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_BASE_CLK_FREQ / 2) /* EXT / 2 */ 165 #define CONFIG_PLL1_CLK_FREQ (CONFIG_BASE_CLK_FREQ * 156 / 2) 166 #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 167 #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 168 #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 169 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_MP_CLK_FREQ 170 171 #define CONFIG_SYS_TMU_CLK_DIV 4 172 #define CONFIG_SYS_HZ 1000 173 174 #endif /* __LAGER_H */ 175