1 /* 2 * include/configs/lager.h 3 * This file is lager board configuration. 4 * 5 * Copyright (C) 2013 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __LAGER_H 11 #define __LAGER_H 12 13 #undef DEBUG 14 #define CONFIG_ARMV7 15 #define CONFIG_R8A7790 16 #define CONFIG_RMOBILE_BOARD_STRING "Lager" 17 #define CONFIG_SH_GPIO_PFC 18 19 #include <asm/arch/rmobile.h> 20 21 #define CONFIG_CMD_EDITENV 22 #define CONFIG_CMD_SAVEENV 23 #define CONFIG_CMD_MEMORY 24 #define CONFIG_CMD_DFL 25 #define CONFIG_CMD_SDRAM 26 #define CONFIG_CMD_RUN 27 #define CONFIG_CMD_LOADS 28 #define CONFIG_CMD_NET 29 #define CONFIG_CMD_MII 30 #define CONFIG_CMD_PING 31 #define CONFIG_CMD_DHCP 32 #define CONFIG_CMD_NFS 33 #define CONFIG_CMD_BOOTZ 34 #define CONFIG_CMD_USB 35 #define CONFIG_CMD_FAT 36 #define CONFIG_CMD_SF 37 #define CONFIG_CMD_SPI 38 39 #define CONFIG_FAT_WRITE 40 #define CONFIG_EXT4_WRITE 41 42 #define CONFIG_SYS_TEXT_BASE 0xE8080000 43 #define CONFIG_SYS_THUMB_BUILD 44 #define CONFIG_SYS_GENERIC_BOARD 45 46 /* Support File sytems */ 47 #define CONFIG_DOS_PARTITION 48 #define CONFIG_SUPPORT_VFAT 49 50 #define CONFIG_CMDLINE_TAG 51 #define CONFIG_SETUP_MEMORY_TAGS 52 #define CONFIG_INITRD_TAG 53 #define CONFIG_CMDLINE_EDITING 54 #define CONFIG_OF_LIBFDT 55 56 /* #define CONFIG_OF_LIBFDT */ 57 #define BOARD_LATE_INIT 58 59 #define CONFIG_BAUDRATE 38400 60 #define CONFIG_BOOTDELAY 3 61 #define CONFIG_BOOTARGS "" 62 63 #define CONFIG_VERSION_VARIABLE 64 #undef CONFIG_SHOW_BOOT_PROGRESS 65 66 #define CONFIG_ARCH_CPU_INIT 67 #define CONFIG_DISPLAY_CPUINFO 68 #define CONFIG_DISPLAY_BOARDINFO 69 #define CONFIG_BOARD_EARLY_INIT_F 70 #define CONFIG_TMU_TIMER 71 72 /* STACK */ 73 #define CONFIG_SYS_INIT_SP_ADDR 0xE827fffc 74 #define STACK_AREA_SIZE 0xC000 75 #define LOW_LEVEL_MERAM_STACK \ 76 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 77 78 /* MEMORY */ 79 #define LAGER_SDRAM_BASE 0x40000000 80 #define LAGER_SDRAM_SIZE (2048u * 1024 * 1024) 81 #define LAGER_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 82 83 #define CONFIG_SYS_LONGHELP 84 #define CONFIG_SYS_CBSIZE 256 85 #define CONFIG_SYS_PBSIZE 256 86 #define CONFIG_SYS_MAXARGS 16 87 #define CONFIG_SYS_BARGSIZE 512 88 #define CONFIG_SYS_BAUDRATE_TABLE { 38400, 115200 } 89 90 /* SCIF */ 91 #define CONFIG_SCIF_CONSOLE 92 #define CONFIG_CONS_SCIF0 93 #define CONFIG_SCIF_USE_EXT_CLK 94 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 95 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 96 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 97 98 #define CONFIG_SYS_MEMTEST_START (LAGER_SDRAM_BASE) 99 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 100 504 * 1024 * 1024) 101 #undef CONFIG_SYS_ALT_MEMTEST 102 #undef CONFIG_SYS_MEMTEST_SCRATCH 103 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 104 105 #define CONFIG_SYS_SDRAM_BASE (LAGER_SDRAM_BASE) 106 #define CONFIG_SYS_SDRAM_SIZE (LAGER_UBOOT_SDRAM_SIZE) 107 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fc0) 108 #define CONFIG_NR_DRAM_BANKS 1 109 110 #define CONFIG_SYS_MONITOR_BASE 0x00000000 111 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 112 #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) 113 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 114 115 /* USE SPI */ 116 #define CONFIG_SPI 117 #define CONFIG_SPI_FLASH_BAR 118 #define CONFIG_SH_QSPI 119 #define CONFIG_SPI_FLASH 120 #define CONFIG_SPI_FLASH_SPANSION 121 #define CONFIG_SYS_NO_FLASH 122 123 /* ENV setting */ 124 #define CONFIG_ENV_IS_IN_SPI_FLASH 125 #define CONFIG_ENV_ADDR 0xC0000 126 127 /* Common ENV setting */ 128 #define CONFIG_ENV_OVERWRITE 129 #define CONFIG_ENV_SECT_SIZE (256 * 1024) 130 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR) 131 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 132 #define CONFIG_ENV_SIZE_REDUND (CONFIG_SYS_MONITOR_LEN) 133 134 /* SH Ether */ 135 #define CONFIG_NET_MULTI 136 #define CONFIG_SH_ETHER 137 #define CONFIG_SH_ETHER_USE_PORT 0 138 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 139 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 140 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 141 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 142 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 143 #define CONFIG_PHYLIB 144 #define CONFIG_PHY_MICREL 145 #define CONFIG_BITBANGMII 146 #define CONFIG_BITBANGMII_MULTI 147 148 /* I2C */ 149 #define CONFIG_SYS_I2C 150 #define CONFIG_SYS_I2C_RCAR 151 #define CONFIG_SYS_RCAR_I2C0_BASE 0xE6508000 152 #define CONFIG_SYS_RCAR_I2C0_SPEED 400000 153 #define CONFIG_SYS_RCAR_I2C1_BASE 0xE6518000 154 #define CONFIG_SYS_RCAR_I2C1_SPEED 400000 155 #define CONFIG_SYS_RCAR_I2C2_BASE 0xE6530000 156 #define CONFIG_SYS_RCAR_I2C2_SPEED 400000 157 #define CONFIG_SYS_RCAR_I2C3_BASE 0xE6540000 158 #define CONFIG_SYS_RCAR_I2C3_SPEED 400000 159 #define CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS 4 160 161 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 162 163 /* Board Clock */ 164 #define RMOBILE_XTAL_CLK 20000000u 165 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 166 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) /* EXT / 2 */ 167 #define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 156 / 2) 168 #define CONFIG_PLL1_DIV2_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 2) 169 #define CONFIG_MP_CLK_FREQ (CONFIG_PLL1_DIV2_CLK_FREQ / 15) 170 #define CONFIG_HP_CLK_FREQ (CONFIG_PLL1_CLK_FREQ / 12) 171 #define CONFIG_SH_SCIF_CLK_FREQ 14745600 /* External Clock */ 172 173 #define CONFIG_SYS_TMU_CLK_DIV 4 174 175 /* USB */ 176 #define CONFIG_USB_EHCI 177 #define CONFIG_USB_EHCI_RMOBILE 178 #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 179 #define CONFIG_USB_STORAGE 180 181 #endif /* __LAGER_H */ 182