1 /* 2 * include/configs/lager.h 3 * This file is lager board configuration. 4 * 5 * Copyright (C) 2013, 2014 Renesas Electronics Corporation 6 * 7 * SPDX-License-Identifier: GPL-2.0 8 */ 9 10 #ifndef __LAGER_H 11 #define __LAGER_H 12 13 #undef DEBUG 14 15 #include "rcar-gen2-common.h" 16 17 #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 18 #define STACK_AREA_SIZE 0x00100000 19 #define LOW_LEVEL_MERAM_STACK \ 20 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 21 22 /* MEMORY */ 23 #define RCAR_GEN2_SDRAM_BASE 0x40000000 24 #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) 25 #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 26 27 /* SH Ether */ 28 #define CONFIG_SH_ETHER_USE_PORT 0 29 #define CONFIG_SH_ETHER_PHY_ADDR 0x1 30 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 31 #define CONFIG_SH_ETHER_CACHE_WRITEBACK 32 #define CONFIG_SH_ETHER_CACHE_INVALIDATE 33 #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 34 #define CONFIG_BITBANGMII 35 #define CONFIG_BITBANGMII_MULTI 36 37 /* Board Clock */ 38 #define RMOBILE_XTAL_CLK 20000000u 39 #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 40 #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 41 42 #define CONFIG_SYS_TMU_CLK_DIV 4 43 44 #define CONFIG_EXTRA_ENV_SETTINGS \ 45 "fdt_high=0xffffffff\0" \ 46 "initrd_high=0xffffffff\0" 47 48 /* SPL support */ 49 #define CONFIG_SPL_TEXT_BASE 0xe6300000 50 #define CONFIG_SPL_STACK 0xe6340000 51 #define CONFIG_SPL_MAX_SIZE 0x4000 52 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 53 #ifdef CONFIG_SPL_BUILD 54 #define CONFIG_CONS_SCIF0 55 #define CONFIG_SH_SCIF_CLK_FREQ 65000000 56 #endif 57 58 #endif /* __LAGER_H */ 59