1 /* 2 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 3 * Copyright (C) 2012 Renesas Solutions Corp. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __KZM9G_H 9 #define __KZM9G_H 10 11 #undef DEBUG 12 13 #define CONFIG_SYS_CACHELINE_SIZE 32 14 15 #define CONFIG_SH73A0 16 #define CONFIG_KZM_A9_GT 17 #define CONFIG_RMOBILE_BOARD_STRING "KMC KZM-A9-GT" 18 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G 19 20 #include <asm/arch/rmobile.h> 21 22 #define CONFIG_ARCH_CPU_INIT 23 #define CONFIG_DISPLAY_CPUINFO 24 #define CONFIG_DISPLAY_BOARDINFO 25 #define CONFIG_BOARD_EARLY_INIT_F 26 #define CONFIG_OF_LIBFDT 27 28 #define CONFIG_CMDLINE_TAG 29 #define CONFIG_SETUP_MEMORY_TAGS 30 #define CONFIG_INITRD_TAG 31 #define CONFIG_DOS_PARTITION 32 #define CONFIG_CMD_FAT 33 #define CONFIG_CMD_BOOTZ 34 35 #define CONFIG_BAUDRATE 115200 36 #define CONFIG_BOOTARGS "root=/dev/null console=ttySC4,115200" 37 #define CONFIG_BOOTDELAY 3 38 39 #define CONFIG_VERSION_VARIABLE 40 #undef CONFIG_SHOW_BOOT_PROGRESS 41 42 /* MEMORY */ 43 #define KZM_SDRAM_BASE (0x40000000) 44 #define PHYS_SDRAM KZM_SDRAM_BASE 45 #define PHYS_SDRAM_SIZE (512 * 1024 * 1024) 46 #define CONFIG_NR_DRAM_BANKS (1) 47 48 /* NOR Flash */ 49 #define KZM_FLASH_BASE (0x00000000) 50 #define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE) 51 #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) 52 #define CONFIG_SYS_MAX_FLASH_BANKS (1) 53 #define CONFIG_SYS_MAX_FLASH_SECT (512) 54 55 /* prompt */ 56 #define CONFIG_SYS_LONGHELP 57 #define CONFIG_SYS_CBSIZE 256 58 #define CONFIG_SYS_PBSIZE 256 59 #define CONFIG_SYS_MAXARGS 16 60 #define CONFIG_SYS_BARGSIZE 512 61 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 62 63 /* SCIF */ 64 #define CONFIG_SCIF_CONSOLE 65 #define CONFIG_CONS_SCIF4 66 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 67 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 68 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 69 70 #define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE) 71 #define CONFIG_SYS_MEMTEST_END \ 72 (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 73 #undef CONFIG_SYS_ALT_MEMTEST 74 #undef CONFIG_SYS_MEMTEST_SCRATCH 75 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 76 77 #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */ 78 #define CONFIG_SYS_INIT_RAM_SIZE (0x10000) 79 #define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4) 80 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 81 CONFIG_SYS_INIT_RAM_SIZE - \ 82 GENERATED_GBL_DATA_SIZE) 83 #define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024) 84 #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT) 85 #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT) 86 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) 87 88 #define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE) 89 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 90 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 91 92 #define CONFIG_SYS_TEXT_BASE 0x00000000 93 #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000 94 95 /* FLASH */ 96 #define CONFIG_FLASH_CFI_DRIVER 97 #define CONFIG_SYS_FLASH_CFI 98 #undef CONFIG_SYS_FLASH_QUIET_TEST 99 #define CONFIG_SYS_FLASH_EMPTY_INFO 100 #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */ 101 #define CONFIG_ENV_SIZE FLASH_SECTOR_SIZE 102 #define CONFIG_ENV_OFFSET FLASH_SECTOR_SIZE 103 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 104 105 /* Timeout for Flash erase operations (in ms) */ 106 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 107 /* Timeout for Flash write operations (in ms) */ 108 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 109 /* Timeout for Flash set sector lock bit operations (in ms) */ 110 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 111 /* Timeout for Flash clear lock bit operations (in ms) */ 112 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 113 114 #undef CONFIG_SYS_FLASH_PROTECTION 115 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 116 #define CONFIG_ENV_IS_IN_FLASH 117 118 /* GPIO / PFC */ 119 #define CONFIG_SH_GPIO_PFC 120 121 /* Clock */ 122 #define CONFIG_GLOBAL_TIMER 123 #define CONFIG_SYS_CLK_FREQ (48000000) 124 #define CONFIG_SYS_CPU_CLK (1196000000) 125 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 126 #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ 127 128 /* Ether */ 129 #define CONFIG_CMD_PING 130 #define CONFIG_CMD_DHCP 131 #define CONFIG_SMC911X 132 #define CONFIG_SMC911X_BASE (0x10000000) 133 #define CONFIG_SMC911X_32_BIT 134 #define CONFIG_NFS_TIMEOUT 10000UL 135 136 /* I2C */ 137 #define CONFIG_CMD_I2C 138 #define CONFIG_SYS_I2C 139 #define CONFIG_SYS_I2C_SH 140 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5 141 #define CONFIG_SYS_I2C_SH_BASE0 0xE6820000 142 #define CONFIG_SYS_I2C_SH_SPEED0 100000 143 #define CONFIG_SYS_I2C_SH_BASE1 0xE6822000 144 #define CONFIG_SYS_I2C_SH_SPEED1 100000 145 #define CONFIG_SYS_I2C_SH_BASE2 0xE6824000 146 #define CONFIG_SYS_I2C_SH_SPEED2 100000 147 #define CONFIG_SYS_I2C_SH_BASE3 0xE6826000 148 #define CONFIG_SYS_I2C_SH_SPEED3 100000 149 #define CONFIG_SYS_I2C_SH_BASE4 0xE6828000 150 #define CONFIG_SYS_I2C_SH_SPEED4 100000 151 #define CONFIG_SH_I2C_8BIT 152 #define CONFIG_SH_I2C_DATA_HIGH 4 153 #define CONFIG_SH_I2C_DATA_LOW 5 154 #define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */ 155 156 #endif /* __KZM9G_H */ 157