1 /* 2 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 3 * Copyright (C) 2012 Renesas Solutions Corp. 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8 #ifndef __KZM9G_H 9 #define __KZM9G_H 10 11 #undef DEBUG 12 13 #define CONFIG_SYS_CACHELINE_SIZE 32 14 15 #define CONFIG_SH73A0 16 #define CONFIG_KZM_A9_GT 17 #define CONFIG_RMOBILE_BOARD_STRING "KMC KZM-A9-GT" 18 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G 19 20 #include <asm/arch/rmobile.h> 21 22 #define CONFIG_ARCH_CPU_INIT 23 #define CONFIG_DISPLAY_CPUINFO 24 #define CONFIG_DISPLAY_BOARDINFO 25 #define CONFIG_BOARD_EARLY_INIT_F 26 27 #define CONFIG_CMDLINE_TAG 28 #define CONFIG_SETUP_MEMORY_TAGS 29 #define CONFIG_INITRD_TAG 30 #define CONFIG_DOS_PARTITION 31 32 #define CONFIG_BAUDRATE 115200 33 #define CONFIG_BOOTARGS "root=/dev/null console=ttySC4,115200" 34 #define CONFIG_BOOTDELAY 3 35 36 #define CONFIG_VERSION_VARIABLE 37 #undef CONFIG_SHOW_BOOT_PROGRESS 38 39 /* MEMORY */ 40 #define KZM_SDRAM_BASE (0x40000000) 41 #define PHYS_SDRAM KZM_SDRAM_BASE 42 #define PHYS_SDRAM_SIZE (512 * 1024 * 1024) 43 #define CONFIG_NR_DRAM_BANKS (1) 44 45 /* NOR Flash */ 46 #define KZM_FLASH_BASE (0x00000000) 47 #define CONFIG_SYS_FLASH_BASE (KZM_FLASH_BASE) 48 #define CONFIG_SYS_FLASH_CFI_WIDTH (FLASH_CFI_16BIT) 49 #define CONFIG_SYS_MAX_FLASH_BANKS (1) 50 #define CONFIG_SYS_MAX_FLASH_SECT (512) 51 52 /* prompt */ 53 #define CONFIG_SYS_LONGHELP 54 #define CONFIG_SYS_CBSIZE 256 55 #define CONFIG_SYS_PBSIZE 256 56 #define CONFIG_SYS_MAXARGS 16 57 #define CONFIG_SYS_BARGSIZE 512 58 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 59 60 /* SCIF */ 61 #define CONFIG_SCIF_CONSOLE 62 #define CONFIG_CONS_SCIF4 63 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 64 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 65 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 66 67 #define CONFIG_SYS_MEMTEST_START (KZM_SDRAM_BASE) 68 #define CONFIG_SYS_MEMTEST_END \ 69 (CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024)) 70 #undef CONFIG_SYS_ALT_MEMTEST 71 #undef CONFIG_SYS_MEMTEST_SCRATCH 72 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 73 74 #define CONFIG_SYS_INIT_RAM_ADDR (0xE5600000) /* on MERAM */ 75 #define CONFIG_SYS_INIT_RAM_SIZE (0x10000) 76 #define LOW_LEVEL_MERAM_STACK (CONFIG_SYS_INIT_RAM_ADDR - 4) 77 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 78 CONFIG_SYS_INIT_RAM_SIZE - \ 79 GENERATED_GBL_DATA_SIZE) 80 #define CONFIG_SDRAM_OFFSET_FOR_RT (16 * 1024 * 1024) 81 #define CONFIG_SYS_SDRAM_BASE (KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT) 82 #define CONFIG_SYS_SDRAM_SIZE (PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT) 83 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024) 84 85 #define CONFIG_SYS_MONITOR_BASE (KZM_FLASH_BASE) 86 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) 87 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 88 89 #define CONFIG_SYS_TEXT_BASE 0x00000000 90 #define CONFIG_STANDALONE_LOAD_ADDR 0x41000000 91 92 /* FLASH */ 93 #define CONFIG_FLASH_CFI_DRIVER 94 #define CONFIG_SYS_FLASH_CFI 95 #undef CONFIG_SYS_FLASH_QUIET_TEST 96 #define CONFIG_SYS_FLASH_EMPTY_INFO 97 #define FLASH_SECTOR_SIZE (256 * 1024) /* 256 KB sectors */ 98 #define CONFIG_ENV_SIZE FLASH_SECTOR_SIZE 99 #define CONFIG_ENV_OFFSET FLASH_SECTOR_SIZE 100 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 101 102 /* Timeout for Flash erase operations (in ms) */ 103 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 104 /* Timeout for Flash write operations (in ms) */ 105 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 106 /* Timeout for Flash set sector lock bit operations (in ms) */ 107 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 108 /* Timeout for Flash clear lock bit operations (in ms) */ 109 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 110 111 #undef CONFIG_SYS_FLASH_PROTECTION 112 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 113 #define CONFIG_ENV_IS_IN_FLASH 114 115 /* GPIO / PFC */ 116 #define CONFIG_SH_GPIO_PFC 117 118 /* Clock */ 119 #define CONFIG_GLOBAL_TIMER 120 #define CONFIG_SYS_CLK_FREQ (48000000) 121 #define CONFIG_SYS_CPU_CLK (1196000000) 122 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 123 #define TMU_CLK_DIVIDER (4) /* 4 (default), 16, 64, 256 or 1024 */ 124 125 /* Ether */ 126 #define CONFIG_SMC911X 127 #define CONFIG_SMC911X_BASE (0x10000000) 128 #define CONFIG_SMC911X_32_BIT 129 #define CONFIG_NFS_TIMEOUT 10000UL 130 131 /* I2C */ 132 #define CONFIG_SYS_I2C 133 #define CONFIG_SYS_I2C_SH 134 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5 135 #define CONFIG_SYS_I2C_SH_BASE0 0xE6820000 136 #define CONFIG_SYS_I2C_SH_SPEED0 100000 137 #define CONFIG_SYS_I2C_SH_BASE1 0xE6822000 138 #define CONFIG_SYS_I2C_SH_SPEED1 100000 139 #define CONFIG_SYS_I2C_SH_BASE2 0xE6824000 140 #define CONFIG_SYS_I2C_SH_SPEED2 100000 141 #define CONFIG_SYS_I2C_SH_BASE3 0xE6826000 142 #define CONFIG_SYS_I2C_SH_SPEED3 100000 143 #define CONFIG_SYS_I2C_SH_BASE4 0xE6828000 144 #define CONFIG_SYS_I2C_SH_SPEED4 100000 145 #define CONFIG_SH_I2C_8BIT 146 #define CONFIG_SH_I2C_DATA_HIGH 4 147 #define CONFIG_SH_I2C_DATA_LOW 5 148 #define CONFIG_SH_I2C_CLOCK 104000000 /* 104 MHz */ 149 150 #endif /* __KZM9G_H */ 151