xref: /openbmc/u-boot/include/configs/kzm9g.h (revision a7da6f8c)
1 /*
2  * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
3  * Copyright (C) 2012 Renesas Solutions Corp.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __KZM9G_H
9 #define __KZM9G_H
10 
11 #undef DEBUG
12 
13 #define CONFIG_SYS_CACHELINE_SIZE	32
14 
15 #define CONFIG_SH73A0
16 #define CONFIG_KZM_A9_GT
17 #define CONFIG_ARCH_RMOBILE_BOARD_STRING	"KMC KZM-A9-GT"
18 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
19 
20 #include <asm/arch/rmobile.h>
21 
22 #define CONFIG_ARCH_CPU_INIT
23 #define CONFIG_DISPLAY_CPUINFO
24 #define CONFIG_DISPLAY_BOARDINFO
25 #define CONFIG_BOARD_EARLY_INIT_F
26 
27 #define CONFIG_CMDLINE_TAG
28 #define CONFIG_SETUP_MEMORY_TAGS
29 #define CONFIG_INITRD_TAG
30 #define CONFIG_DOS_PARTITION
31 
32 #define CONFIG_BAUDRATE		115200
33 #define CONFIG_BOOTARGS		"root=/dev/null console=ttySC4,115200"
34 
35 #define CONFIG_VERSION_VARIABLE
36 #undef  CONFIG_SHOW_BOOT_PROGRESS
37 
38 /* MEMORY */
39 #define KZM_SDRAM_BASE	(0x40000000)
40 #define PHYS_SDRAM		KZM_SDRAM_BASE
41 #define PHYS_SDRAM_SIZE		(512 * 1024 * 1024)
42 #define CONFIG_NR_DRAM_BANKS	(1)
43 
44 /* NOR Flash */
45 #define KZM_FLASH_BASE	(0x00000000)
46 #define CONFIG_SYS_FLASH_BASE		(KZM_FLASH_BASE)
47 #define CONFIG_SYS_FLASH_CFI_WIDTH	(FLASH_CFI_16BIT)
48 #define CONFIG_SYS_MAX_FLASH_BANKS	(1)
49 #define CONFIG_SYS_MAX_FLASH_SECT	(512)
50 
51 /* prompt */
52 #define CONFIG_SYS_LONGHELP
53 #define CONFIG_SYS_CBSIZE		256
54 #define CONFIG_SYS_PBSIZE		256
55 #define CONFIG_SYS_MAXARGS		16
56 #define CONFIG_SYS_BARGSIZE		512
57 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
58 
59 /* SCIF */
60 #define CONFIG_SCIF_CONSOLE
61 #define CONFIG_CONS_SCIF4
62 #undef  CONFIG_SYS_CONSOLE_INFO_QUIET
63 #undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
64 #undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE
65 
66 #define CONFIG_SYS_MEMTEST_START	(KZM_SDRAM_BASE)
67 #define CONFIG_SYS_MEMTEST_END \
68 	(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
69 #undef  CONFIG_SYS_ALT_MEMTEST
70 #undef  CONFIG_SYS_MEMTEST_SCRATCH
71 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
72 
73 #define CONFIG_SYS_INIT_RAM_ADDR	(0xE5600000) /* on MERAM */
74 #define CONFIG_SYS_INIT_RAM_SIZE	(0x10000)
75 #define LOW_LEVEL_MERAM_STACK		(CONFIG_SYS_INIT_RAM_ADDR - 4)
76 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
77 					 CONFIG_SYS_INIT_RAM_SIZE - \
78 					 GENERATED_GBL_DATA_SIZE)
79 #define CONFIG_SDRAM_OFFSET_FOR_RT	(16 * 1024 * 1024)
80 #define CONFIG_SYS_SDRAM_BASE	(KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
81 #define CONFIG_SYS_SDRAM_SIZE	(PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
82 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
83 
84 #define CONFIG_SYS_MONITOR_BASE	(KZM_FLASH_BASE)
85 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 128 * 1024)
86 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
87 
88 #define CONFIG_SYS_TEXT_BASE		0x00000000
89 #define CONFIG_STANDALONE_LOAD_ADDR	0x41000000
90 
91 /* FLASH */
92 #define CONFIG_FLASH_CFI_DRIVER
93 #define CONFIG_SYS_FLASH_CFI
94 #undef  CONFIG_SYS_FLASH_QUIET_TEST
95 #define CONFIG_SYS_FLASH_EMPTY_INFO
96 #define FLASH_SECTOR_SIZE	(256 * 1024)	/* 256 KB sectors */
97 #define CONFIG_ENV_SIZE		FLASH_SECTOR_SIZE
98 #define CONFIG_ENV_OFFSET	FLASH_SECTOR_SIZE
99 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
100 
101 /* Timeout for Flash erase operations (in ms) */
102 #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
103 /* Timeout for Flash write operations (in ms) */
104 #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
105 /* Timeout for Flash set sector lock bit operations (in ms) */
106 #define CONFIG_SYS_FLASH_LOCK_TOUT		(3 * 1000)
107 /* Timeout for Flash clear lock bit operations (in ms) */
108 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
109 
110 #undef  CONFIG_SYS_FLASH_PROTECTION
111 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
112 #define CONFIG_ENV_IS_IN_FLASH
113 
114 /* GPIO / PFC */
115 #define CONFIG_SH_GPIO_PFC
116 
117 /* Clock */
118 #define CONFIG_GLOBAL_TIMER
119 #define CONFIG_SYS_CLK_FREQ	(48000000)
120 #define CONFIG_SYS_CPU_CLK	(1196000000)
121 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
122 #define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
123 
124 /* Ether */
125 #define CONFIG_SMC911X
126 #define CONFIG_SMC911X_BASE	(0x10000000)
127 #define CONFIG_SMC911X_32_BIT
128 #define CONFIG_NFS_TIMEOUT 10000UL
129 
130 /* I2C */
131 #define CONFIG_SYS_I2C
132 #define CONFIG_SYS_I2C_SH
133 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
134 #define CONFIG_SYS_I2C_SH_BASE0	0xE6820000
135 #define CONFIG_SYS_I2C_SH_SPEED0	100000
136 #define CONFIG_SYS_I2C_SH_BASE1	0xE6822000
137 #define CONFIG_SYS_I2C_SH_SPEED1	100000
138 #define CONFIG_SYS_I2C_SH_BASE2	0xE6824000
139 #define CONFIG_SYS_I2C_SH_SPEED2	100000
140 #define CONFIG_SYS_I2C_SH_BASE3	0xE6826000
141 #define CONFIG_SYS_I2C_SH_SPEED3	100000
142 #define CONFIG_SYS_I2C_SH_BASE4	0xE6828000
143 #define CONFIG_SYS_I2C_SH_SPEED4	100000
144 #define CONFIG_SH_I2C_8BIT
145 #define CONFIG_SH_I2C_DATA_HIGH 4
146 #define CONFIG_SH_I2C_DATA_LOW  5
147 #define CONFIG_SH_I2C_CLOCK     104000000 /* 104 MHz */
148 
149 #endif /* __KZM9G_H */
150