xref: /openbmc/u-boot/include/configs/kzm9g.h (revision 8435179271106ec6fe9a9a5679b897755b1db8dd)
1 /*
2  * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
3  * Copyright (C) 2012 Renesas Solutions Corp.
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef __KZM9G_H
9 #define __KZM9G_H
10 
11 #undef DEBUG
12 
13 #define CONFIG_SH73A0
14 #define CONFIG_KZM_A9_GT
15 #define CONFIG_ARCH_RMOBILE_BOARD_STRING	"KMC KZM-A9-GT"
16 #define CONFIG_MACH_TYPE MACH_TYPE_KZM9G
17 
18 #include <asm/arch/rmobile.h>
19 
20 #define CONFIG_ARCH_CPU_INIT
21 #define CONFIG_BOARD_EARLY_INIT_F
22 
23 #define CONFIG_CMDLINE_TAG
24 #define CONFIG_SETUP_MEMORY_TAGS
25 #define CONFIG_INITRD_TAG
26 #define CONFIG_DOS_PARTITION
27 
28 #define CONFIG_BAUDRATE		115200
29 #define CONFIG_BOOTARGS		"root=/dev/null console=ttySC4,115200"
30 
31 #undef  CONFIG_SHOW_BOOT_PROGRESS
32 
33 /* MEMORY */
34 #define KZM_SDRAM_BASE	(0x40000000)
35 #define PHYS_SDRAM		KZM_SDRAM_BASE
36 #define PHYS_SDRAM_SIZE		(512 * 1024 * 1024)
37 #define CONFIG_NR_DRAM_BANKS	(1)
38 
39 /* NOR Flash */
40 #define KZM_FLASH_BASE	(0x00000000)
41 #define CONFIG_SYS_FLASH_BASE		(KZM_FLASH_BASE)
42 #define CONFIG_SYS_FLASH_CFI_WIDTH	(FLASH_CFI_16BIT)
43 #define CONFIG_SYS_MAX_FLASH_BANKS	(1)
44 #define CONFIG_SYS_MAX_FLASH_SECT	(512)
45 
46 /* prompt */
47 #define CONFIG_SYS_LONGHELP
48 #define CONFIG_SYS_CBSIZE		256
49 #define CONFIG_SYS_PBSIZE		256
50 #define CONFIG_SYS_MAXARGS		16
51 #define CONFIG_SYS_BARGSIZE		512
52 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
53 
54 /* SCIF */
55 #define CONFIG_SCIF_CONSOLE
56 #define CONFIG_CONS_SCIF4
57 #undef  CONFIG_SYS_CONSOLE_INFO_QUIET
58 #undef  CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
59 #undef  CONFIG_SYS_CONSOLE_ENV_OVERWRITE
60 
61 #define CONFIG_SYS_MEMTEST_START	(KZM_SDRAM_BASE)
62 #define CONFIG_SYS_MEMTEST_END \
63 	(CONFIG_SYS_MEMTEST_START + (60 * 1024 * 1024))
64 #undef  CONFIG_SYS_ALT_MEMTEST
65 #undef  CONFIG_SYS_MEMTEST_SCRATCH
66 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
67 
68 #define CONFIG_SYS_INIT_RAM_ADDR	(0xE5600000) /* on MERAM */
69 #define CONFIG_SYS_INIT_RAM_SIZE	(0x10000)
70 #define LOW_LEVEL_MERAM_STACK		(CONFIG_SYS_INIT_RAM_ADDR - 4)
71 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
72 					 CONFIG_SYS_INIT_RAM_SIZE - \
73 					 GENERATED_GBL_DATA_SIZE)
74 #define CONFIG_SDRAM_OFFSET_FOR_RT	(16 * 1024 * 1024)
75 #define CONFIG_SYS_SDRAM_BASE	(KZM_SDRAM_BASE + CONFIG_SDRAM_OFFSET_FOR_RT)
76 #define CONFIG_SYS_SDRAM_SIZE	(PHYS_SDRAM_SIZE - CONFIG_SDRAM_OFFSET_FOR_RT)
77 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 32 * 1024 * 1024)
78 
79 #define CONFIG_SYS_MONITOR_BASE	(KZM_FLASH_BASE)
80 #define CONFIG_SYS_MALLOC_LEN	(CONFIG_ENV_SIZE + 128 * 1024)
81 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
82 
83 #define CONFIG_SYS_TEXT_BASE		0x00000000
84 #define CONFIG_STANDALONE_LOAD_ADDR	0x41000000
85 
86 /* FLASH */
87 #define CONFIG_FLASH_CFI_DRIVER
88 #define CONFIG_SYS_FLASH_CFI
89 #undef  CONFIG_SYS_FLASH_QUIET_TEST
90 #define CONFIG_SYS_FLASH_EMPTY_INFO
91 #define FLASH_SECTOR_SIZE	(256 * 1024)	/* 256 KB sectors */
92 #define CONFIG_ENV_SIZE		FLASH_SECTOR_SIZE
93 #define CONFIG_ENV_OFFSET	FLASH_SECTOR_SIZE
94 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
95 
96 /* Timeout for Flash erase operations (in ms) */
97 #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
98 /* Timeout for Flash write operations (in ms) */
99 #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
100 /* Timeout for Flash set sector lock bit operations (in ms) */
101 #define CONFIG_SYS_FLASH_LOCK_TOUT		(3 * 1000)
102 /* Timeout for Flash clear lock bit operations (in ms) */
103 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
104 
105 #undef  CONFIG_SYS_FLASH_PROTECTION
106 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
107 #define CONFIG_ENV_IS_IN_FLASH
108 
109 /* GPIO / PFC */
110 #define CONFIG_SH_GPIO_PFC
111 
112 /* Clock */
113 #define CONFIG_GLOBAL_TIMER
114 #define CONFIG_SYS_CLK_FREQ	(48000000)
115 #define CONFIG_SYS_CPU_CLK	(1196000000)
116 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
117 #define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
118 
119 /* Ether */
120 #define CONFIG_SMC911X
121 #define CONFIG_SMC911X_BASE	(0x10000000)
122 #define CONFIG_SMC911X_32_BIT
123 #define CONFIG_NFS_TIMEOUT 10000UL
124 
125 /* I2C */
126 #define CONFIG_SYS_I2C
127 #define CONFIG_SYS_I2C_SH
128 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 5
129 #define CONFIG_SYS_I2C_SH_BASE0	0xE6820000
130 #define CONFIG_SYS_I2C_SH_SPEED0	100000
131 #define CONFIG_SYS_I2C_SH_BASE1	0xE6822000
132 #define CONFIG_SYS_I2C_SH_SPEED1	100000
133 #define CONFIG_SYS_I2C_SH_BASE2	0xE6824000
134 #define CONFIG_SYS_I2C_SH_SPEED2	100000
135 #define CONFIG_SYS_I2C_SH_BASE3	0xE6826000
136 #define CONFIG_SYS_I2C_SH_SPEED3	100000
137 #define CONFIG_SYS_I2C_SH_BASE4	0xE6828000
138 #define CONFIG_SYS_I2C_SH_SPEED4	100000
139 #define CONFIG_SH_I2C_8BIT
140 #define CONFIG_SH_I2C_DATA_HIGH 4
141 #define CONFIG_SH_I2C_DATA_LOW  5
142 #define CONFIG_SH_I2C_CLOCK     104000000 /* 104 MHz */
143 
144 #endif /* __KZM9G_H */
145