1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0 */ 21251e490SNobuhiro Iwamatsu /* 31251e490SNobuhiro Iwamatsu * include/configs/koelsch.h 41251e490SNobuhiro Iwamatsu * 51251e490SNobuhiro Iwamatsu * Copyright (C) 2013 Renesas Electronics Corporation 61251e490SNobuhiro Iwamatsu */ 71251e490SNobuhiro Iwamatsu 81251e490SNobuhiro Iwamatsu #ifndef __KOELSCH_H 91251e490SNobuhiro Iwamatsu #define __KOELSCH_H 101251e490SNobuhiro Iwamatsu 115ca6dfe6SNobuhiro Iwamatsu #include "rcar-gen2-common.h" 12b6c96f7fSNobuhiro Iwamatsu 137d0299cdSMarek Vasut #define CONFIG_SYS_INIT_SP_ADDR 0x4f000000 147d0299cdSMarek Vasut #define STACK_AREA_SIZE 0x00100000 151251e490SNobuhiro Iwamatsu #define LOW_LEVEL_MERAM_STACK \ 161251e490SNobuhiro Iwamatsu (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 171251e490SNobuhiro Iwamatsu 181251e490SNobuhiro Iwamatsu /* MEMORY */ 195ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_BASE 0x40000000 205ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) 215ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 221251e490SNobuhiro Iwamatsu 2390362c0cSNobuhiro Iwamatsu /* SH Ether */ 2490362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT 0 2590362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR 0x1 2690362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 2790362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_WRITEBACK 2890362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_INVALIDATE 297d0299cdSMarek Vasut #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 3090362c0cSNobuhiro Iwamatsu #define CONFIG_BITBANGMII 3190362c0cSNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI 3290362c0cSNobuhiro Iwamatsu 331251e490SNobuhiro Iwamatsu /* Board Clock */ 34ae8e1d9dSNobuhiro Iwamatsu #define RMOBILE_XTAL_CLK 20000000u 35ae8e1d9dSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 36ae8e1d9dSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 377d0299cdSMarek Vasut 381251e490SNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV 4 391251e490SNobuhiro Iwamatsu 407d0299cdSMarek Vasut #define CONFIG_EXTRA_ENV_SETTINGS \ 417d0299cdSMarek Vasut "fdt_high=0xffffffff\0" \ 427d0299cdSMarek Vasut "initrd_high=0xffffffff\0" 43bb611cceSNobuhiro Iwamatsu 447d0299cdSMarek Vasut /* SPL support */ 457d0299cdSMarek Vasut #define CONFIG_SPL_TEXT_BASE 0xe6300000 467d0299cdSMarek Vasut #define CONFIG_SPL_STACK 0xe6340000 477d0299cdSMarek Vasut #define CONFIG_SPL_MAX_SIZE 0x4000 487d0299cdSMarek Vasut #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 497d0299cdSMarek Vasut #ifdef CONFIG_SPL_BUILD 507d0299cdSMarek Vasut #define CONFIG_CONS_SCIF0 517d0299cdSMarek Vasut #define CONFIG_SH_SCIF_CLK_FREQ 65000000 527d0299cdSMarek Vasut #endif 5311e32910SNobuhiro Iwamatsu 541251e490SNobuhiro Iwamatsu #endif /* __KOELSCH_H */ 55