11251e490SNobuhiro Iwamatsu /* 21251e490SNobuhiro Iwamatsu * include/configs/koelsch.h 31251e490SNobuhiro Iwamatsu * 41251e490SNobuhiro Iwamatsu * Copyright (C) 2013 Renesas Electronics Corporation 51251e490SNobuhiro Iwamatsu * 61251e490SNobuhiro Iwamatsu * SPDX-License-Identifier: GPL-2.0 71251e490SNobuhiro Iwamatsu */ 81251e490SNobuhiro Iwamatsu 91251e490SNobuhiro Iwamatsu #ifndef __KOELSCH_H 101251e490SNobuhiro Iwamatsu #define __KOELSCH_H 111251e490SNobuhiro Iwamatsu 121251e490SNobuhiro Iwamatsu #undef DEBUG 131251e490SNobuhiro Iwamatsu #define CONFIG_R8A7791 141251e490SNobuhiro Iwamatsu #define CONFIG_RMOBILE_BOARD_STRING "Koelsch" 151251e490SNobuhiro Iwamatsu 16*5ca6dfe6SNobuhiro Iwamatsu #include "rcar-gen2-common.h" 17b6c96f7fSNobuhiro Iwamatsu 1869191fedSNobuhiro Iwamatsu #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 1969191fedSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0x70000000 2069191fedSNobuhiro Iwamatsu #else 21c71b4dd2SNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE 0xE6304000 2269191fedSNobuhiro Iwamatsu #endif 2369191fedSNobuhiro Iwamatsu 241251e490SNobuhiro Iwamatsu /* STACK */ 2569191fedSNobuhiro Iwamatsu #if defined(CONFIG_RMOBILE_EXTRAM_BOOT) 2669191fedSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR 0x7003FFFC 2769191fedSNobuhiro Iwamatsu #else 2869191fedSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR 0xE633fffC 2969191fedSNobuhiro Iwamatsu #endif 3069191fedSNobuhiro Iwamatsu 311251e490SNobuhiro Iwamatsu #define STACK_AREA_SIZE 0xC000 321251e490SNobuhiro Iwamatsu #define LOW_LEVEL_MERAM_STACK \ 331251e490SNobuhiro Iwamatsu (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) 341251e490SNobuhiro Iwamatsu 351251e490SNobuhiro Iwamatsu /* MEMORY */ 36*5ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_BASE 0x40000000 37*5ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_SDRAM_SIZE (2048u * 1024 * 1024) 38*5ca6dfe6SNobuhiro Iwamatsu #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) 391251e490SNobuhiro Iwamatsu 401251e490SNobuhiro Iwamatsu /* SCIF */ 411251e490SNobuhiro Iwamatsu #define CONFIG_SCIF_CONSOLE 421251e490SNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0 43cc45a610SNobuhiro Iwamatsu #define CONFIG_SCIF_USE_EXT_CLK 441251e490SNobuhiro Iwamatsu 451251e490SNobuhiro Iwamatsu /* FLASH */ 46c71b4dd2SNobuhiro Iwamatsu #define CONFIG_SYS_NO_FLASH 47c71b4dd2SNobuhiro Iwamatsu #define CONFIG_SPI 48c71b4dd2SNobuhiro Iwamatsu #define CONFIG_SH_QSPI 49c71b4dd2SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH 50c71b4dd2SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_BAR 51c71b4dd2SNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_SPANSION 521251e490SNobuhiro Iwamatsu 5390362c0cSNobuhiro Iwamatsu /* SH Ether */ 5490362c0cSNobuhiro Iwamatsu #define CONFIG_NET_MULTI 5590362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER 5690362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT 0 5790362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR 0x1 5890362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII 5990362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_WRITEBACK 6090362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_INVALIDATE 6190362c0cSNobuhiro Iwamatsu #define CONFIG_PHYLIB 6290362c0cSNobuhiro Iwamatsu #define CONFIG_PHY_MICREL 6390362c0cSNobuhiro Iwamatsu #define CONFIG_BITBANGMII 6490362c0cSNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI 6590362c0cSNobuhiro Iwamatsu #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 6690362c0cSNobuhiro Iwamatsu 671251e490SNobuhiro Iwamatsu /* Board Clock */ 68ae8e1d9dSNobuhiro Iwamatsu #define RMOBILE_XTAL_CLK 20000000u 69ae8e1d9dSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK 70ae8e1d9dSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2) 711251e490SNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ 14745600 721251e490SNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV 4 731251e490SNobuhiro Iwamatsu 74bb611cceSNobuhiro Iwamatsu /* i2c */ 75bb611cceSNobuhiro Iwamatsu #define CONFIG_CMD_I2C 76bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C 77bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH 78bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SLAVE 0x7F 79bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 3 80bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED0 400000 81bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED1 400000 82bb611cceSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED2 400000 83bb611cceSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_HIGH 4 84bb611cceSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_LOW 5 85bb611cceSNobuhiro Iwamatsu #define CONFIG_SH_I2C_CLOCK 10000000 86bb611cceSNobuhiro Iwamatsu 87b8f383b8SNobuhiro Iwamatsu #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */ 88b8f383b8SNobuhiro Iwamatsu 89aa44ae32SNobuhiro Iwamatsu /* USB */ 90aa44ae32SNobuhiro Iwamatsu #define CONFIG_USB_EHCI 91aa44ae32SNobuhiro Iwamatsu #define CONFIG_USB_EHCI_RMOBILE 925906fadeSNobuhiro Iwamatsu #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 93aa44ae32SNobuhiro Iwamatsu #define CONFIG_USB_STORAGE 94aa44ae32SNobuhiro Iwamatsu 951251e490SNobuhiro Iwamatsu #endif /* __KOELSCH_H */ 96