1 /*
2  * (C) Copyright 2009
3  * Marvell Semiconductor <www.marvell.com>
4  * Prafulla Wadaskar <prafulla@marvell.com>
5  *
6  * (C) Copyright 2009
7  * Stefan Roese, DENX Software Engineering, sr@denx.de.
8  *
9  * (C) Copyright 2011-2012
10  * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
11  * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
12  *
13  * SPDX-License-Identifier:	GPL-2.0+
14  */
15 
16 /*
17  * for linking errors see
18  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
19  */
20 
21 #ifndef _CONFIG_KM_KIRKWOOD_H
22 #define _CONFIG_KM_KIRKWOOD_H
23 
24 /* KM_KIRKWOOD */
25 #if defined(CONFIG_KM_KIRKWOOD)
26 #define CONFIG_HOSTNAME			"km_kirkwood"
27 #define CONFIG_KM_DISABLE_PCIE
28 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
29 
30 /* KM_KIRKWOOD_PCI */
31 #elif defined(CONFIG_KM_KIRKWOOD_PCI)
32 #define CONFIG_HOSTNAME			"km_kirkwood_pci"
33 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
34 #define CONFIG_KM_FPGA_CONFIG
35 #define CONFIG_KM_UBI_PART_BOOT_OPTS		",2048"
36 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
37 
38 /* KM_KIRKWOOD_128M16 */
39 #elif defined(CONFIG_KM_KIRKWOOD_128M16)
40 #define CONFIG_HOSTNAME			"km_kirkwood_128m16"
41 #undef CONFIG_SYS_KWD_CONFIG
42 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
43 #define CONFIG_KM_DISABLE_PCIE
44 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
45 
46 /* KM_NUSA / KM_SUGP1 */
47 #elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1)
48 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
49 
50 # if defined(CONFIG_KM_NUSA)
51 #define CONFIG_HOSTNAME			"kmnusa"
52 # elif defined(CONFIG_KM_SUGP1)
53 #define CONFIG_HOSTNAME			"kmsugp1"
54 #define KM_PCIE_RESET_MPP7
55 #endif
56 
57 #undef CONFIG_SYS_KWD_CONFIG
58 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
59 #define CONFIG_KM_ENV_IS_IN_SPI_NOR
60 #define CONFIG_KM_FPGA_CONFIG
61 #define CONFIG_KM_PIGGY4_88E6352
62 #define CONFIG_MV88E6352_SWITCH
63 #define CONFIG_KM_MVEXTSW_ADDR		0x10
64 
65 /* KM_MGCOGE3UN */
66 #elif defined(CONFIG_KM_MGCOGE3UN)
67 #define CONFIG_HOSTNAME			"mgcoge3un"
68 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
69 #undef CONFIG_SYS_KWD_CONFIG
70 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
71 #define CONFIG_KM_BOARD_EXTRA_ENV	"waitforne=true\0"
72 #define CONFIG_PIGGY_MAC_ADRESS_OFFSET  3
73 #define CONFIG_KM_DISABLE_PCIE
74 #define CONFIG_KM_PIGGY4_88E6061
75 
76 /* KMCOGE5UN */
77 #elif defined(CONFIG_KM_COGE5UN)
78 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
79 #undef	CONFIG_SYS_KWD_CONFIG
80 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
81 #define CONFIG_KM_ENV_IS_IN_SPI_NOR
82 #define CONFIG_PIGGY_MAC_ADRESS_OFFSET	3
83 #define CONFIG_HOSTNAME			"kmcoge5un"
84 #define CONFIG_KM_DISABLE_PCIE
85 #define CONFIG_KM_PIGGY4_88E6352
86 
87 /* KM_PORTL2 */
88 #elif defined(CONFIG_KM_PORTL2)
89 #define CONFIG_HOSTNAME			"portl2"
90 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
91 #define CONFIG_KM_PIGGY4_88E6061
92 
93 /* KM_SUV31 */
94 #elif defined(CONFIG_KM_SUV31)
95 #define CONFIG_KM_IVM_BUS		1	/* I2C2 (Mux-Port 1)*/
96 #define CONFIG_HOSTNAME			"kmsuv31"
97 #undef CONFIG_SYS_KWD_CONFIG
98 #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
99 #define CONFIG_KM_ENV_IS_IN_SPI_NOR
100 #define CONFIG_KM_FPGA_CONFIG
101 #define CONFIG_KM_UBI_PART_BOOT_OPTS		",2048"
102 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
103 #else
104 #error ("Board unsupported")
105 #endif
106 
107 /* include common defines/options for all arm based Keymile boards */
108 #include "km/km_arm.h"
109 
110 #if defined(CONFIG_KM_PIGGY4_88E6352)
111 /*
112  * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
113  * an Marvell 88E6352 simple switch.
114  * In this case we have to change the default settings for the etherent mac.
115  * There is NO ethernet phy. The ARM and Switch are conencted directly over
116  * RGMII in MAC-MAC mode
117  * In this case 1GBit full duplex and autoneg off
118  */
119 #define PORT_SERIAL_CONTROL_VALUE		( \
120 	MVGBE_FORCE_LINK_PASS			    | \
121 	MVGBE_DIS_AUTO_NEG_FOR_DUPLX		| \
122 	MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL	| \
123 	MVGBE_ADV_NO_FLOW_CTRL			    | \
124 	MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX	| \
125 	MVGBE_FORCE_BP_MODE_NO_JAM		    | \
126 	(1 << 9) /* Reserved bit has to be 1 */	| \
127 	MVGBE_DO_NOT_FORCE_LINK_FAIL		| \
128 	MVGBE_DIS_AUTO_NEG_SPEED_GMII		| \
129 	MVGBE_DTE_ADV_0				        | \
130 	MVGBE_MIIPHY_MAC_MODE			    | \
131 	MVGBE_AUTO_NEG_NO_CHANGE		    | \
132 	MVGBE_MAX_RX_PACKET_1552BYTE		| \
133 	MVGBE_CLR_EXT_LOOPBACK			    | \
134 	MVGBE_SET_FULL_DUPLEX_MODE		    | \
135 	MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX	|\
136 	MVGBE_SET_GMII_SPEED_TO_1000	    |\
137 	MVGBE_SET_MII_SPEED_TO_100)
138 
139 #endif
140 
141 #ifdef CONFIG_KM_PIGGY4_88E6061
142 /*
143  * Some keymile boards like mgcoge3un have their PIGGY4 connected via
144  * an Marvell 88E6061 simple switch.
145  * In this case we have to change the default settings for the
146  * ethernet phy connected to the kirkwood.
147  * In this case 100MB full duplex and autoneg off
148  */
149 #define PORT_SERIAL_CONTROL_VALUE		( \
150 	MVGBE_FORCE_LINK_PASS			| \
151 	MVGBE_DIS_AUTO_NEG_FOR_DUPLX		| \
152 	MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL	| \
153 	MVGBE_ADV_NO_FLOW_CTRL			| \
154 	MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX	| \
155 	MVGBE_FORCE_BP_MODE_NO_JAM		| \
156 	(1 << 9) /* Reserved bit has to be 1 */	| \
157 	MVGBE_DO_NOT_FORCE_LINK_FAIL		| \
158 	MVGBE_DIS_AUTO_NEG_SPEED_GMII		| \
159 	MVGBE_DTE_ADV_0				| \
160 	MVGBE_MIIPHY_MAC_MODE			| \
161 	MVGBE_AUTO_NEG_NO_CHANGE		| \
162 	MVGBE_MAX_RX_PACKET_1552BYTE		| \
163 	MVGBE_CLR_EXT_LOOPBACK			| \
164 	MVGBE_SET_FULL_DUPLEX_MODE		| \
165 	MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX	|\
166 	MVGBE_SET_GMII_SPEED_TO_10_100	|\
167 	MVGBE_SET_MII_SPEED_TO_100)
168 #endif
169 
170 #ifdef CONFIG_KM_DISABLE_PCI
171 #undef  CONFIG_KIRKWOOD_PCIE_INIT
172 #endif
173 
174 #endif /* _CONFIG_KM_KIRKWOOD */
175