183b40c31SHolger Brunck /*
283b40c31SHolger Brunck  * (C) Copyright 2009
383b40c31SHolger Brunck  * Marvell Semiconductor <www.marvell.com>
483b40c31SHolger Brunck  * Prafulla Wadaskar <prafulla@marvell.com>
583b40c31SHolger Brunck  *
683b40c31SHolger Brunck  * (C) Copyright 2009
783b40c31SHolger Brunck  * Stefan Roese, DENX Software Engineering, sr@denx.de.
883b40c31SHolger Brunck  *
98170aefcSHolger Brunck  * (C) Copyright 2011-2012
108170aefcSHolger Brunck  * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
118170aefcSHolger Brunck  * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
1283b40c31SHolger Brunck  *
1383b40c31SHolger Brunck  * See file CREDITS for list of people who contributed to this
1483b40c31SHolger Brunck  * project.
1583b40c31SHolger Brunck  *
1683b40c31SHolger Brunck  * This program is free software; you can redistribute it and/or
1783b40c31SHolger Brunck  * modify it under the terms of the GNU General Public License as
1883b40c31SHolger Brunck  * published by the Free Software Foundation; either version 2 of
1983b40c31SHolger Brunck  * the License, or (at your option) any later version.
2083b40c31SHolger Brunck  *
2183b40c31SHolger Brunck  * This program is distributed in the hope that it will be useful,
2283b40c31SHolger Brunck  * but WITHOUT ANY WARRANTY; without even the implied warranty of
2383b40c31SHolger Brunck  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
2483b40c31SHolger Brunck  * GNU General Public License for more details.
2583b40c31SHolger Brunck  *
2683b40c31SHolger Brunck  * You should have received a copy of the GNU General Public License
2783b40c31SHolger Brunck  * along with this program; if not, write to the Free Software
2883b40c31SHolger Brunck  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
2983b40c31SHolger Brunck  * MA 02110-1301 USA
3083b40c31SHolger Brunck  */
3183b40c31SHolger Brunck 
3283b40c31SHolger Brunck /*
3383b40c31SHolger Brunck  * for linking errors see
3483b40c31SHolger Brunck  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
3583b40c31SHolger Brunck  */
3683b40c31SHolger Brunck 
3783b40c31SHolger Brunck #ifndef _CONFIG_KM_KIRKWOOD_H
3883b40c31SHolger Brunck #define _CONFIG_KM_KIRKWOOD_H
3983b40c31SHolger Brunck 
40e29c6d04SHolger Brunck #if defined(CONFIG_KM_KIRKWOOD)
4183b40c31SHolger Brunck #define CONFIG_IDENT_STRING		"\nKeymile Kirkwood"
42*d9354530SHolger Brunck #define CONFIG_HOSTNAME			km_kirkwood
4383b40c31SHolger Brunck #undef  CONFIG_KIRKWOOD_PCIE_INIT
448170aefcSHolger Brunck #define KM_IVM_BUS			"pca9544a:70:9"	/* I2C2 (Mux-Port 1)*/
45e29c6d04SHolger Brunck #elif defined(CONFIG_KM_KIRKWOOD_PCI)
4683b40c31SHolger Brunck #define CONFIG_IDENT_STRING		"\nKeymile Kirkwood PCI"
47*d9354530SHolger Brunck #define CONFIG_HOSTNAME			km_kirkwood_pci
488170aefcSHolger Brunck #define KM_IVM_BUS			"pca9544a:70:9"	/* I2C2 (Mux-Port 1)*/
498170aefcSHolger Brunck /* KM_NUSA */
508170aefcSHolger Brunck #elif defined(CONFIG_KM_NUSA)
518170aefcSHolger Brunck #define KM_IVM_BUS			"pca9547:70:9"	/* I2C2 (Mux-Port 1)*/
528170aefcSHolger Brunck #define CONFIG_IDENT_STRING		"\nKeymile NUSA"
53*d9354530SHolger Brunck #define CONFIG_HOSTNAME			kmnusa
548170aefcSHolger Brunck #undef CONFIG_SYS_KWD_CONFIG
558170aefcSHolger Brunck #define CONFIG_SYS_KWD_CONFIG \
568170aefcSHolger Brunck 		$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
578170aefcSHolger Brunck #define CONFIG_KM_ENV_IS_IN_SPI_NOR
588170aefcSHolger Brunck #define CONFIG_KM_FPGA_CONFIG
598170aefcSHolger Brunck #define CONFIG_KM_PIGGY4_88E6352
608170aefcSHolger Brunck 
61*d9354530SHolger Brunck #elif defined(CONFIG_KM_COGE5UN)
62*d9354530SHolger Brunck #define CONFIG_IDENT_STRING		"\nKeymile COGE5UN"
63*d9354530SHolger Brunck #define KM_IVM_BUS			"pca9547:70:9"	/* I2C2 (Mux-Port 1)*/
64*d9354530SHolger Brunck #undef	CONFIG_SYS_KWD_CONFIG
65*d9354530SHolger Brunck #define CONFIG_SYS_KWD_CONFIG \
66*d9354530SHolger Brunck 		$(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
67*d9354530SHolger Brunck #define CONFIG_KM_ENV_IS_IN_SPI_NOR
68*d9354530SHolger Brunck #define CONFIG_PIGGY_MAC_ADRESS_OFFSET	3
69*d9354530SHolger Brunck #define CONFIG_HOSTNAME			kmcoge5un
70*d9354530SHolger Brunck #define CONFIG_KM_DISABLE_PCIE
71*d9354530SHolger Brunck #define CONFIG_KM_PIGGY4_88E6352
728170aefcSHolger Brunck #else
738170aefcSHolger Brunck #error ("Board unsupported")
7483b40c31SHolger Brunck #endif
7583b40c31SHolger Brunck 
768170aefcSHolger Brunck /* include common defines/options for all arm based Keymile boards */
778170aefcSHolger Brunck #include "km/km_arm.h"
788170aefcSHolger Brunck 
798170aefcSHolger Brunck #ifndef CONFIG_KM_ENV_IS_IN_SPI_NOR
8083b40c31SHolger Brunck #define KM_ENV_BUS	"pca9544a:70:d"	/* I2C2 (Mux-Port 5)*/
818170aefcSHolger Brunck #endif
828170aefcSHolger Brunck 
838170aefcSHolger Brunck #if defined(CONFIG_KM_PIGGY4_88E6352)
848170aefcSHolger Brunck /*
858170aefcSHolger Brunck  * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
868170aefcSHolger Brunck  * an Marvell 88E6352 simple switch.
878170aefcSHolger Brunck  * In this case we have to change the default settings for the etherent mac.
888170aefcSHolger Brunck  * There is NO ethernet phy. The ARM and Switch are conencted directly over
898170aefcSHolger Brunck  * RGMII in MAC-MAC mode
908170aefcSHolger Brunck  * In this case 1GBit full duplex and autoneg off
918170aefcSHolger Brunck  */
928170aefcSHolger Brunck #define PORT_SERIAL_CONTROL_VALUE		( \
938170aefcSHolger Brunck 	MVGBE_FORCE_LINK_PASS			    | \
948170aefcSHolger Brunck 	MVGBE_DIS_AUTO_NEG_FOR_DUPLX		| \
958170aefcSHolger Brunck 	MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL	| \
968170aefcSHolger Brunck 	MVGBE_ADV_NO_FLOW_CTRL			    | \
978170aefcSHolger Brunck 	MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX	| \
988170aefcSHolger Brunck 	MVGBE_FORCE_BP_MODE_NO_JAM		    | \
998170aefcSHolger Brunck 	(1 << 9) /* Reserved bit has to be 1 */	| \
1008170aefcSHolger Brunck 	MVGBE_DO_NOT_FORCE_LINK_FAIL		| \
1018170aefcSHolger Brunck 	MVGBE_DIS_AUTO_NEG_SPEED_GMII		| \
1028170aefcSHolger Brunck 	MVGBE_DTE_ADV_0				        | \
1038170aefcSHolger Brunck 	MVGBE_MIIPHY_MAC_MODE			    | \
1048170aefcSHolger Brunck 	MVGBE_AUTO_NEG_NO_CHANGE		    | \
1058170aefcSHolger Brunck 	MVGBE_MAX_RX_PACKET_1552BYTE		| \
1068170aefcSHolger Brunck 	MVGBE_CLR_EXT_LOOPBACK			    | \
1078170aefcSHolger Brunck 	MVGBE_SET_FULL_DUPLEX_MODE		    | \
1088170aefcSHolger Brunck 	MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX	|\
1098170aefcSHolger Brunck 	MVGBE_SET_GMII_SPEED_TO_1000	    |\
1108170aefcSHolger Brunck 	MVGBE_SET_MII_SPEED_TO_100)
1118170aefcSHolger Brunck 
1128170aefcSHolger Brunck #endif
11383b40c31SHolger Brunck 
114f0d64257SHolger Brunck /* GPIO Pin from kirkwood connected to PROGRAM_B pin of the xilinx FPGA */
115f0d64257SHolger Brunck #define KM_XLX_PROGRAM_B_PIN    39
116f0d64257SHolger Brunck 
11783b40c31SHolger Brunck #endif /* _CONFIG_KM_KIRKWOOD */
118