183b40c31SHolger Brunck /* 283b40c31SHolger Brunck * (C) Copyright 2009 383b40c31SHolger Brunck * Marvell Semiconductor <www.marvell.com> 483b40c31SHolger Brunck * Prafulla Wadaskar <prafulla@marvell.com> 583b40c31SHolger Brunck * 683b40c31SHolger Brunck * (C) Copyright 2009 783b40c31SHolger Brunck * Stefan Roese, DENX Software Engineering, sr@denx.de. 883b40c31SHolger Brunck * 9*8170aefcSHolger Brunck * (C) Copyright 2011-2012 10*8170aefcSHolger Brunck * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com 11*8170aefcSHolger Brunck * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com 1283b40c31SHolger Brunck * 1383b40c31SHolger Brunck * See file CREDITS for list of people who contributed to this 1483b40c31SHolger Brunck * project. 1583b40c31SHolger Brunck * 1683b40c31SHolger Brunck * This program is free software; you can redistribute it and/or 1783b40c31SHolger Brunck * modify it under the terms of the GNU General Public License as 1883b40c31SHolger Brunck * published by the Free Software Foundation; either version 2 of 1983b40c31SHolger Brunck * the License, or (at your option) any later version. 2083b40c31SHolger Brunck * 2183b40c31SHolger Brunck * This program is distributed in the hope that it will be useful, 2283b40c31SHolger Brunck * but WITHOUT ANY WARRANTY; without even the implied warranty of 2383b40c31SHolger Brunck * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2483b40c31SHolger Brunck * GNU General Public License for more details. 2583b40c31SHolger Brunck * 2683b40c31SHolger Brunck * You should have received a copy of the GNU General Public License 2783b40c31SHolger Brunck * along with this program; if not, write to the Free Software 2883b40c31SHolger Brunck * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 2983b40c31SHolger Brunck * MA 02110-1301 USA 3083b40c31SHolger Brunck */ 3183b40c31SHolger Brunck 3283b40c31SHolger Brunck /* 3383b40c31SHolger Brunck * for linking errors see 3483b40c31SHolger Brunck * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 3583b40c31SHolger Brunck */ 3683b40c31SHolger Brunck 3783b40c31SHolger Brunck #ifndef _CONFIG_KM_KIRKWOOD_H 3883b40c31SHolger Brunck #define _CONFIG_KM_KIRKWOOD_H 3983b40c31SHolger Brunck 40e29c6d04SHolger Brunck #if defined(CONFIG_KM_KIRKWOOD) 4183b40c31SHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile Kirkwood" 4283b40c31SHolger Brunck #undef CONFIG_KIRKWOOD_PCIE_INIT 43*8170aefcSHolger Brunck #define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ 44e29c6d04SHolger Brunck #elif defined(CONFIG_KM_KIRKWOOD_PCI) 4583b40c31SHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI" 46*8170aefcSHolger Brunck #define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ 47*8170aefcSHolger Brunck /* KM_NUSA */ 48*8170aefcSHolger Brunck #elif defined(CONFIG_KM_NUSA) 49*8170aefcSHolger Brunck #define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/ 50*8170aefcSHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile NUSA" 51*8170aefcSHolger Brunck #undef CONFIG_SYS_KWD_CONFIG 52*8170aefcSHolger Brunck #define CONFIG_SYS_KWD_CONFIG \ 53*8170aefcSHolger Brunck $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg 54*8170aefcSHolger Brunck #define CONFIG_KM_ENV_IS_IN_SPI_NOR 55*8170aefcSHolger Brunck #define CONFIG_KM_FPGA_CONFIG 56*8170aefcSHolger Brunck #define CONFIG_KM_PIGGY4_88E6352 57*8170aefcSHolger Brunck 58*8170aefcSHolger Brunck #else 59*8170aefcSHolger Brunck #error ("Board unsupported") 6083b40c31SHolger Brunck #endif 6183b40c31SHolger Brunck 62*8170aefcSHolger Brunck /* include common defines/options for all arm based Keymile boards */ 63*8170aefcSHolger Brunck #include "km/km_arm.h" 64*8170aefcSHolger Brunck 6583b40c31SHolger Brunck #define CONFIG_HOSTNAME km_kirkwood 6683b40c31SHolger Brunck 67*8170aefcSHolger Brunck #ifndef CONFIG_KM_ENV_IS_IN_SPI_NOR 6883b40c31SHolger Brunck #define KM_ENV_BUS "pca9544a:70:d" /* I2C2 (Mux-Port 5)*/ 69*8170aefcSHolger Brunck #endif 70*8170aefcSHolger Brunck 71*8170aefcSHolger Brunck #if defined(CONFIG_KM_PIGGY4_88E6352) 72*8170aefcSHolger Brunck /* 73*8170aefcSHolger Brunck * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via 74*8170aefcSHolger Brunck * an Marvell 88E6352 simple switch. 75*8170aefcSHolger Brunck * In this case we have to change the default settings for the etherent mac. 76*8170aefcSHolger Brunck * There is NO ethernet phy. The ARM and Switch are conencted directly over 77*8170aefcSHolger Brunck * RGMII in MAC-MAC mode 78*8170aefcSHolger Brunck * In this case 1GBit full duplex and autoneg off 79*8170aefcSHolger Brunck */ 80*8170aefcSHolger Brunck #define PORT_SERIAL_CONTROL_VALUE ( \ 81*8170aefcSHolger Brunck MVGBE_FORCE_LINK_PASS | \ 82*8170aefcSHolger Brunck MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ 83*8170aefcSHolger Brunck MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ 84*8170aefcSHolger Brunck MVGBE_ADV_NO_FLOW_CTRL | \ 85*8170aefcSHolger Brunck MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ 86*8170aefcSHolger Brunck MVGBE_FORCE_BP_MODE_NO_JAM | \ 87*8170aefcSHolger Brunck (1 << 9) /* Reserved bit has to be 1 */ | \ 88*8170aefcSHolger Brunck MVGBE_DO_NOT_FORCE_LINK_FAIL | \ 89*8170aefcSHolger Brunck MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ 90*8170aefcSHolger Brunck MVGBE_DTE_ADV_0 | \ 91*8170aefcSHolger Brunck MVGBE_MIIPHY_MAC_MODE | \ 92*8170aefcSHolger Brunck MVGBE_AUTO_NEG_NO_CHANGE | \ 93*8170aefcSHolger Brunck MVGBE_MAX_RX_PACKET_1552BYTE | \ 94*8170aefcSHolger Brunck MVGBE_CLR_EXT_LOOPBACK | \ 95*8170aefcSHolger Brunck MVGBE_SET_FULL_DUPLEX_MODE | \ 96*8170aefcSHolger Brunck MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ 97*8170aefcSHolger Brunck MVGBE_SET_GMII_SPEED_TO_1000 |\ 98*8170aefcSHolger Brunck MVGBE_SET_MII_SPEED_TO_100) 99*8170aefcSHolger Brunck 100*8170aefcSHolger Brunck #endif 10183b40c31SHolger Brunck 102f0d64257SHolger Brunck /* GPIO Pin from kirkwood connected to PROGRAM_B pin of the xilinx FPGA */ 103f0d64257SHolger Brunck #define KM_XLX_PROGRAM_B_PIN 39 104f0d64257SHolger Brunck 10583b40c31SHolger Brunck #endif /* _CONFIG_KM_KIRKWOOD */ 106