183b40c31SHolger Brunck /* 283b40c31SHolger Brunck * (C) Copyright 2009 383b40c31SHolger Brunck * Marvell Semiconductor <www.marvell.com> 483b40c31SHolger Brunck * Prafulla Wadaskar <prafulla@marvell.com> 583b40c31SHolger Brunck * 683b40c31SHolger Brunck * (C) Copyright 2009 783b40c31SHolger Brunck * Stefan Roese, DENX Software Engineering, sr@denx.de. 883b40c31SHolger Brunck * 98170aefcSHolger Brunck * (C) Copyright 2011-2012 108170aefcSHolger Brunck * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com 118170aefcSHolger Brunck * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com 1283b40c31SHolger Brunck * 13*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 1483b40c31SHolger Brunck */ 1583b40c31SHolger Brunck 1683b40c31SHolger Brunck /* 1783b40c31SHolger Brunck * for linking errors see 1883b40c31SHolger Brunck * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 1983b40c31SHolger Brunck */ 2083b40c31SHolger Brunck 2183b40c31SHolger Brunck #ifndef _CONFIG_KM_KIRKWOOD_H 2283b40c31SHolger Brunck #define _CONFIG_KM_KIRKWOOD_H 2383b40c31SHolger Brunck 2448ced62cSHolger Brunck /* KM_KIRKWOOD */ 25e29c6d04SHolger Brunck #if defined(CONFIG_KM_KIRKWOOD) 2683b40c31SHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile Kirkwood" 27d9354530SHolger Brunck #define CONFIG_HOSTNAME km_kirkwood 2848ced62cSHolger Brunck #define CONFIG_KM_DISABLE_PCIE 298170aefcSHolger Brunck #define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ 3048ced62cSHolger Brunck 3148ced62cSHolger Brunck /* KM_KIRKWOOD_PCI */ 32e29c6d04SHolger Brunck #elif defined(CONFIG_KM_KIRKWOOD_PCI) 3383b40c31SHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI" 34d9354530SHolger Brunck #define CONFIG_HOSTNAME km_kirkwood_pci 358170aefcSHolger Brunck #define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ 3648ced62cSHolger Brunck #define CONFIG_KM_FPGA_CONFIG 3748ced62cSHolger Brunck 388170aefcSHolger Brunck /* KM_NUSA */ 398170aefcSHolger Brunck #elif defined(CONFIG_KM_NUSA) 408170aefcSHolger Brunck #define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/ 418170aefcSHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile NUSA" 42d9354530SHolger Brunck #define CONFIG_HOSTNAME kmnusa 438170aefcSHolger Brunck #undef CONFIG_SYS_KWD_CONFIG 448170aefcSHolger Brunck #define CONFIG_SYS_KWD_CONFIG \ 458170aefcSHolger Brunck $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg 468170aefcSHolger Brunck #define CONFIG_KM_ENV_IS_IN_SPI_NOR 478170aefcSHolger Brunck #define CONFIG_KM_FPGA_CONFIG 488170aefcSHolger Brunck #define CONFIG_KM_PIGGY4_88E6352 49be3e8be0SValentin Longchamp #define CONFIG_MV88E6352_SWITCH 50be3e8be0SValentin Longchamp #define CONFIG_KM_MVEXTSW_ADDR 0x10 518170aefcSHolger Brunck 52f945439aSHolger Brunck /* KM_MGCOGE3UN */ 53f945439aSHolger Brunck #elif defined(CONFIG_KM_MGCOGE3UN) 54f945439aSHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile COGE3UN" 55f945439aSHolger Brunck #define CONFIG_HOSTNAME mgcoge3un 56f945439aSHolger Brunck #define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/ 57f945439aSHolger Brunck #undef CONFIG_SYS_KWD_CONFIG 58f945439aSHolger Brunck #define CONFIG_SYS_KWD_CONFIG \ 59f945439aSHolger Brunck $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage-memphis.cfg 60f945439aSHolger Brunck #define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0" 61f945439aSHolger Brunck #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3 62f945439aSHolger Brunck #define CONFIG_KM_DISABLE_PCIE 63f945439aSHolger Brunck #define CONFIG_KM_PIGGY4_88E6061 64f945439aSHolger Brunck 65f945439aSHolger Brunck /* KMCOGE5UN */ 66d9354530SHolger Brunck #elif defined(CONFIG_KM_COGE5UN) 67d9354530SHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile COGE5UN" 68d9354530SHolger Brunck #define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/ 69d9354530SHolger Brunck #undef CONFIG_SYS_KWD_CONFIG 70d9354530SHolger Brunck #define CONFIG_SYS_KWD_CONFIG \ 71d9354530SHolger Brunck $(SRCTREE)/$(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg 72d9354530SHolger Brunck #define CONFIG_KM_ENV_IS_IN_SPI_NOR 73d9354530SHolger Brunck #define CONFIG_PIGGY_MAC_ADRESS_OFFSET 3 74d9354530SHolger Brunck #define CONFIG_HOSTNAME kmcoge5un 75d9354530SHolger Brunck #define CONFIG_KM_DISABLE_PCIE 76d9354530SHolger Brunck #define CONFIG_KM_PIGGY4_88E6352 776ef64861SHolger Brunck 786ef64861SHolger Brunck /* KM_PORTL2 */ 796ef64861SHolger Brunck #elif defined(CONFIG_KM_PORTL2) 806ef64861SHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile Port-L2" 816ef64861SHolger Brunck #define CONFIG_HOSTNAME portl2 826ef64861SHolger Brunck #define KM_IVM_BUS "pca9544a:70:9" /* I2C2 (Mux-Port 1)*/ 836ef64861SHolger Brunck #define CONFIG_KM_PIGGY4_88E6061 846ef64861SHolger Brunck 8590639feaSHolger Brunck /* KM_SUV31 */ 8690639feaSHolger Brunck #elif defined(CONFIG_KM_SUV31) 8790639feaSHolger Brunck #define KM_IVM_BUS "pca9547:70:9" /* I2C2 (Mux-Port 1)*/ 8890639feaSHolger Brunck #define CONFIG_IDENT_STRING "\nKeymile SUV31" 8990639feaSHolger Brunck #define CONFIG_HOSTNAME kmsuv31 9090639feaSHolger Brunck #define CONFIG_KM_ENV_IS_IN_SPI_NOR 9190639feaSHolger Brunck #define CONFIG_KM_FPGA_CONFIG 9290639feaSHolger Brunck 938170aefcSHolger Brunck #else 948170aefcSHolger Brunck #error ("Board unsupported") 9583b40c31SHolger Brunck #endif 9683b40c31SHolger Brunck 978170aefcSHolger Brunck /* include common defines/options for all arm based Keymile boards */ 988170aefcSHolger Brunck #include "km/km_arm.h" 998170aefcSHolger Brunck 1008170aefcSHolger Brunck #ifndef CONFIG_KM_ENV_IS_IN_SPI_NOR 10183b40c31SHolger Brunck #define KM_ENV_BUS "pca9544a:70:d" /* I2C2 (Mux-Port 5)*/ 1028170aefcSHolger Brunck #endif 1038170aefcSHolger Brunck 1048170aefcSHolger Brunck #if defined(CONFIG_KM_PIGGY4_88E6352) 1058170aefcSHolger Brunck /* 1068170aefcSHolger Brunck * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via 1078170aefcSHolger Brunck * an Marvell 88E6352 simple switch. 1088170aefcSHolger Brunck * In this case we have to change the default settings for the etherent mac. 1098170aefcSHolger Brunck * There is NO ethernet phy. The ARM and Switch are conencted directly over 1108170aefcSHolger Brunck * RGMII in MAC-MAC mode 1118170aefcSHolger Brunck * In this case 1GBit full duplex and autoneg off 1128170aefcSHolger Brunck */ 1138170aefcSHolger Brunck #define PORT_SERIAL_CONTROL_VALUE ( \ 1148170aefcSHolger Brunck MVGBE_FORCE_LINK_PASS | \ 1158170aefcSHolger Brunck MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ 1168170aefcSHolger Brunck MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ 1178170aefcSHolger Brunck MVGBE_ADV_NO_FLOW_CTRL | \ 1188170aefcSHolger Brunck MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ 1198170aefcSHolger Brunck MVGBE_FORCE_BP_MODE_NO_JAM | \ 1208170aefcSHolger Brunck (1 << 9) /* Reserved bit has to be 1 */ | \ 1218170aefcSHolger Brunck MVGBE_DO_NOT_FORCE_LINK_FAIL | \ 1228170aefcSHolger Brunck MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ 1238170aefcSHolger Brunck MVGBE_DTE_ADV_0 | \ 1248170aefcSHolger Brunck MVGBE_MIIPHY_MAC_MODE | \ 1258170aefcSHolger Brunck MVGBE_AUTO_NEG_NO_CHANGE | \ 1268170aefcSHolger Brunck MVGBE_MAX_RX_PACKET_1552BYTE | \ 1278170aefcSHolger Brunck MVGBE_CLR_EXT_LOOPBACK | \ 1288170aefcSHolger Brunck MVGBE_SET_FULL_DUPLEX_MODE | \ 1298170aefcSHolger Brunck MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ 1308170aefcSHolger Brunck MVGBE_SET_GMII_SPEED_TO_1000 |\ 1318170aefcSHolger Brunck MVGBE_SET_MII_SPEED_TO_100) 1328170aefcSHolger Brunck 1338170aefcSHolger Brunck #endif 13483b40c31SHolger Brunck 135f945439aSHolger Brunck #ifdef CONFIG_KM_PIGGY4_88E6061 136f945439aSHolger Brunck /* 137f945439aSHolger Brunck * Some keymile boards like mgcoge3un have their PIGGY4 connected via 138f945439aSHolger Brunck * an Marvell 88E6061 simple switch. 139f945439aSHolger Brunck * In this case we have to change the default settings for the 140f945439aSHolger Brunck * ethernet phy connected to the kirkwood. 141f945439aSHolger Brunck * In this case 100MB full duplex and autoneg off 142f945439aSHolger Brunck */ 143f945439aSHolger Brunck #define PORT_SERIAL_CONTROL_VALUE ( \ 144f945439aSHolger Brunck MVGBE_FORCE_LINK_PASS | \ 145f945439aSHolger Brunck MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \ 146f945439aSHolger Brunck MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \ 147f945439aSHolger Brunck MVGBE_ADV_NO_FLOW_CTRL | \ 148f945439aSHolger Brunck MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \ 149f945439aSHolger Brunck MVGBE_FORCE_BP_MODE_NO_JAM | \ 150f945439aSHolger Brunck (1 << 9) /* Reserved bit has to be 1 */ | \ 151f945439aSHolger Brunck MVGBE_DO_NOT_FORCE_LINK_FAIL | \ 152f945439aSHolger Brunck MVGBE_DIS_AUTO_NEG_SPEED_GMII | \ 153f945439aSHolger Brunck MVGBE_DTE_ADV_0 | \ 154f945439aSHolger Brunck MVGBE_MIIPHY_MAC_MODE | \ 155f945439aSHolger Brunck MVGBE_AUTO_NEG_NO_CHANGE | \ 156f945439aSHolger Brunck MVGBE_MAX_RX_PACKET_1552BYTE | \ 157f945439aSHolger Brunck MVGBE_CLR_EXT_LOOPBACK | \ 158f945439aSHolger Brunck MVGBE_SET_FULL_DUPLEX_MODE | \ 159f945439aSHolger Brunck MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\ 160f945439aSHolger Brunck MVGBE_SET_GMII_SPEED_TO_10_100 |\ 161f945439aSHolger Brunck MVGBE_SET_MII_SPEED_TO_100) 162f945439aSHolger Brunck #endif 163f945439aSHolger Brunck 164f945439aSHolger Brunck #ifdef CONFIG_KM_DISABLE_PCI 165f945439aSHolger Brunck #undef CONFIG_KIRKWOOD_PCIE_INIT 166f945439aSHolger Brunck #endif 167b37f7724SValentin Longchamp 168b37f7724SValentin Longchamp 16983b40c31SHolger Brunck #endif /* _CONFIG_KM_KIRKWOOD */ 170