1 /* 2 * (C) Copyright 2009 3 * Marvell Semiconductor <www.marvell.com> 4 * Prafulla Wadaskar <prafulla@marvell.com> 5 * 6 * (C) Copyright 2009 7 * Stefan Roese, DENX Software Engineering, sr@denx.de. 8 * 9 * (C) Copyright 2010-2011 10 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 /* 16 * for linking errors see 17 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 18 */ 19 20 #ifndef _CONFIG_KM_ARM_H 21 #define _CONFIG_KM_ARM_H 22 23 /* 24 * High Level Configuration Options (easy to change) 25 */ 26 #define CONFIG_MARVELL 27 #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ 28 #define CONFIG_KW88F6281 /* SOC Name */ 29 #define CONFIG_MACH_KM_KIRKWOOD /* Machine type */ 30 31 #define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD 32 33 #define CONFIG_NAND_ECC_BCH 34 #define CONFIG_BCH 35 36 /* include common defines/options for all Keymile boards */ 37 #include "keymile-common.h" 38 39 #define CONFIG_CMD_NAND 40 41 /* SPI NOR Flash default params, used by sf commands */ 42 #define CONFIG_SF_DEFAULT_SPEED 8100000 43 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 44 45 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 46 #define CONFIG_ENV_SPI_BUS 0 47 #define CONFIG_ENV_SPI_CS 0 48 #define CONFIG_ENV_SPI_MAX_HZ 8100000 49 #define CONFIG_ENV_SPI_MODE SPI_MODE_3 50 #endif 51 52 /* Reserve 4 MB for malloc */ 53 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 54 55 #include "asm/arch/config.h" 56 57 #define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */ 58 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ 59 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ 60 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 61 62 /* pseudo-non volatile RAM [hex] */ 63 #define CONFIG_KM_PNVRAM 0x80000 64 /* physical RAM MTD size [hex] */ 65 #define CONFIG_KM_PHRAM 0x17F000 66 67 #define CONFIG_KM_CRAMFS_ADDR 0x2400000 68 #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */ 69 #define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */ 70 71 /* architecture specific default bootargs */ 72 #define CONFIG_KM_DEF_BOOT_ARGS_CPU \ 73 "bootcountaddr=${bootcountaddr} ${mtdparts}" \ 74 " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}" 75 76 #define CONFIG_KM_DEF_ENV_CPU \ 77 "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ 78 CONFIG_KM_UPDATE_UBOOT \ 79 "set_fdthigh=setenv fdt_high ${kernelmem}\0" \ 80 "checkfdt=" \ 81 "if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; " \ 82 "then true; else setenv cramfsloadfdt true; " \ 83 "setenv boot bootm ${load_addr_r}; " \ 84 "echo No FDT found, booting with the kernel " \ 85 "appended one; fi\0" \ 86 "" 87 88 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 89 #define CONFIG_MISC_INIT_R 90 91 /* 92 * NS16550 Configuration 93 */ 94 #define CONFIG_SYS_NS16550_SERIAL 95 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 96 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 97 #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE 98 #define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE 99 100 /* 101 * Serial Port configuration 102 * The following definitions let you select what serial you want to use 103 * for your console driver. 104 */ 105 106 #define CONFIG_CONS_INDEX 1 /* Console on UART0 */ 107 108 /* 109 * For booting Linux, the board info and command line data 110 * have to be in the first 8 MB of memory, since this is 111 * the maximum mapped by the Linux kernel during initialization. 112 */ 113 #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ 114 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 115 #define CONFIG_INITRD_TAG /* enable INITRD tag */ 116 #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 117 118 /* 119 * NAND Flash configuration 120 */ 121 #define CONFIG_SYS_MAX_NAND_DEVICE 1 122 123 #define BOOTFLASH_START 0x0 124 125 /* Kirkwood has two serial IF */ 126 #if (CONFIG_CONS_INDEX == 2) 127 #define CONFIG_KM_CONSOLE_TTY "ttyS1" 128 #else 129 #define CONFIG_KM_CONSOLE_TTY "ttyS0" 130 #endif 131 132 /* 133 * Other required minimal configurations 134 */ 135 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 136 #define CONFIG_NR_DRAM_BANKS 4 137 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 138 139 /* 140 * Ethernet Driver configuration 141 */ 142 #define CONFIG_NETCONSOLE /* include NetConsole support */ 143 #define CONFIG_MII /* expose smi ove miiphy interface */ 144 #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ 145 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ 146 #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ 147 #define CONFIG_PHY_BASE_ADR 0 148 #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 149 #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */ 150 151 /* 152 * I2C related stuff 153 */ 154 #undef CONFIG_I2C_MVTWSI 155 #define CONFIG_SYS_I2C 156 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 157 #define CONFIG_SYS_I2C_INIT_BOARD 158 159 #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ 160 #define CONFIG_SYS_NUM_I2C_BUSES 6 161 #define CONFIG_SYS_I2C_MAX_HOPS 1 162 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ 163 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ 164 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ 165 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ 166 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ 167 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ 168 } 169 170 #ifndef __ASSEMBLY__ 171 #include <asm/arch/gpio.h> 172 extern void __set_direction(unsigned pin, int high); 173 void set_sda(int state); 174 void set_scl(int state); 175 int get_sda(void); 176 int get_scl(void); 177 #define KM_KIRKWOOD_SDA_PIN 8 178 #define KM_KIRKWOOD_SCL_PIN 9 179 #define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300 180 #define KM_KIRKWOOD_ENV_WP 38 181 182 #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) 183 #define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) 184 #define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) 185 #define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) 186 #define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) 187 #endif 188 189 #define I2C_DELAY udelay(1) 190 #define I2C_SOFT_DECLARATIONS 191 192 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x0 193 #define CONFIG_SYS_I2C_SOFT_SPEED 100000 194 195 /* EEprom support 24C128, 24C256 valid for environment eeprom */ 196 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE 197 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */ 198 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 199 200 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 201 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 202 203 /* 204 * Environment variables configurations 205 */ 206 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 207 #define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */ 208 #define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */ 209 #define CONFIG_ENV_SECT_SIZE 0x10000 210 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 211 CONFIG_ENV_SECT_SIZE) 212 #define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */ 213 #else 214 #define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 215 #define CONFIG_ENV_EEPROM_IS_ON_I2C 216 #define CONFIG_SYS_EEPROM_WREN 217 #define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ 218 #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) 219 #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */ 220 #define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ 221 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 222 #endif 223 224 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 225 226 227 /* SPI bus claim MPP configuration */ 228 #define CONFIG_SYS_KW_SPI_MPP 0x0 229 230 #define FLASH_GPIO_PIN 0x00010000 231 #define KM_FLASH_GPIO_PIN 16 232 233 #ifndef MTDIDS_DEFAULT 234 # define MTDIDS_DEFAULT "nand0=orion_nand" 235 #endif /* MTDIDS_DEFAULT */ 236 237 #ifndef MTDPARTS_DEFAULT 238 # define MTDPARTS_DEFAULT "mtdparts=" \ 239 "orion_nand:" \ 240 "-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");" 241 #endif /* MTDPARTS_DEFAULT */ 242 243 #define CONFIG_KM_UPDATE_UBOOT \ 244 "update=" \ 245 "sf probe 0;sf erase 0 +${filesize};" \ 246 "sf write ${load_addr_r} 0 ${filesize};\0" 247 248 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 249 #define CONFIG_KM_NEW_ENV \ 250 "newenv=sf probe 0;" \ 251 "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \ 252 __stringify(CONFIG_ENV_TOTAL_SIZE)"\0" 253 #else 254 #define CONFIG_KM_NEW_ENV \ 255 "newenv=setenv addr 0x100000 && " \ 256 "i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \ 257 "mw.b ${addr} 0 4 && " \ 258 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 259 " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \ 260 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 261 " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0" 262 #endif 263 264 #ifndef CONFIG_KM_BOARD_EXTRA_ENV 265 #define CONFIG_KM_BOARD_EXTRA_ENV "" 266 #endif 267 268 /* 269 * Default environment variables 270 */ 271 #define CONFIG_EXTRA_ENV_SETTINGS \ 272 CONFIG_KM_BOARD_EXTRA_ENV \ 273 CONFIG_KM_DEF_ENV \ 274 CONFIG_KM_NEW_ENV \ 275 "arch=arm\0" \ 276 "" 277 278 #if !defined(CONFIG_MTD_NOR_FLASH) 279 #undef CONFIG_FLASH_CFI_MTD 280 #undef CONFIG_JFFS2_CMDLINE 281 #endif 282 283 /* additions for new relocation code, must be added to all boards */ 284 #define CONFIG_SYS_SDRAM_BASE 0x00000000 285 /* Do early setups now in board_init_f() */ 286 287 /* 288 * resereved pram area at the end of memroy [hex] 289 * 8Mbytes for switch + 4Kbytes for bootcount 290 */ 291 #define CONFIG_KM_RESERVED_PRAM 0x801000 292 /* address for the bootcount (taken from end of RAM) */ 293 #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) 294 /* Use generic bootcount RAM driver */ 295 #define CONFIG_BOOTCOUNT_RAM 296 297 /* enable POST tests */ 298 #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) 299 #define CONFIG_POST_SKIP_ENV_FLAGS 300 #define CONFIG_POST_EXTERNAL_WORD_FUNCS 301 302 /* we do the whole PCIe FPGA config stuff here */ 303 304 #endif /* _CONFIG_KM_ARM_H */ 305