xref: /openbmc/u-boot/include/configs/km/km_arm.h (revision d067624c)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2009
4  * Marvell Semiconductor <www.marvell.com>
5  * Prafulla Wadaskar <prafulla@marvell.com>
6  *
7  * (C) Copyright 2009
8  * Stefan Roese, DENX Software Engineering, sr@denx.de.
9  *
10  * (C) Copyright 2010-2011
11  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
12  */
13 
14 /*
15  * for linking errors see
16  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
17  */
18 
19 #ifndef _CONFIG_KM_ARM_H
20 #define _CONFIG_KM_ARM_H
21 
22 /*
23  * High Level Configuration Options (easy to change)
24  */
25 #define CONFIG_MARVELL
26 #define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
27 #define CONFIG_KW88F6281		/* SOC Name */
28 
29 #define CONFIG_MACH_TYPE	MACH_TYPE_KM_KIRKWOOD
30 
31 #define CONFIG_NAND_ECC_BCH
32 
33 /* include common defines/options for all Keymile boards */
34 #include "keymile-common.h"
35 
36 /* SPI NOR Flash default params, used by sf commands */
37 #define CONFIG_SF_DEFAULT_SPEED		8100000
38 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
39 
40 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
41 #define CONFIG_ENV_SPI_BUS		0
42 #define CONFIG_ENV_SPI_CS		0
43 #define CONFIG_ENV_SPI_MAX_HZ		8100000
44 #define CONFIG_ENV_SPI_MODE		SPI_MODE_3
45 #endif
46 
47 /* Reserve 4 MB for malloc */
48 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
49 
50 #include "asm/arch/config.h"
51 
52 #define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
53 #define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
54 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
55 
56 /* pseudo-non volatile RAM [hex] */
57 #define CONFIG_KM_PNVRAM	0x80000
58 /* physical RAM MTD size [hex] */
59 #define CONFIG_KM_PHRAM		0x17F000
60 
61 #define CONFIG_KM_CRAMFS_ADDR	0x2400000
62 #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 3098KBytes */
63 #define CONFIG_KM_FDT_ADDR	0x23E0000	/*  128KBytes */
64 
65 /* architecture specific default bootargs */
66 #define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
67 		"bootcountaddr=${bootcountaddr} ${mtdparts}"		\
68 		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
69 
70 #define CONFIG_KM_DEF_ENV_CPU						\
71 	"u-boot="CONFIG_HOSTNAME "/u-boot.kwb\0"		\
72 	CONFIG_KM_UPDATE_UBOOT						\
73 	"set_fdthigh=setenv fdt_high ${kernelmem}\0"			\
74 	"checkfdt="							\
75 		"if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; "	\
76 		"then true; else setenv cramfsloadfdt true; "		\
77 		"setenv boot bootm ${load_addr_r}; "			\
78 		"echo No FDT found, booting with the kernel "		\
79 		"appended one; fi\0"					\
80 	""
81 
82 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
83 #define CONFIG_MISC_INIT_R
84 
85 /*
86  * NS16550 Configuration
87  */
88 #define CONFIG_SYS_NS16550_SERIAL
89 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
90 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
91 #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
92 #define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
93 
94 /*
95  * Serial Port configuration
96  * The following definitions let you select what serial you want to use
97  * for your console driver.
98  */
99 
100 /*
101  * For booting Linux, the board info and command line data
102  * have to be in the first 8 MB of memory, since this is
103  * the maximum mapped by the Linux kernel during initialization.
104  */
105 #define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
106 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
107 #define CONFIG_INITRD_TAG		/* enable INITRD tag */
108 #define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */
109 
110 /*
111  * NAND Flash configuration
112  */
113 #define CONFIG_SYS_MAX_NAND_DEVICE	1
114 
115 #define BOOTFLASH_START		0x0
116 
117 /* Kirkwood has two serial IF */
118 #if (CONFIG_CONS_INDEX == 2)
119 #define CONFIG_KM_CONSOLE_TTY	"ttyS1"
120 #else
121 #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
122 #endif
123 
124 /*
125  * Other required minimal configurations
126  */
127 #define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
128 #define CONFIG_NR_DRAM_BANKS	4
129 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
130 
131 /*
132  * Ethernet Driver configuration
133  */
134 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
135 #define CONFIG_MII		/* expose smi ove miiphy interface */
136 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
137 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
138 #define CONFIG_PHY_BASE_ADR	0
139 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
140 #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */
141 
142 /*
143  * I2C related stuff
144  */
145 #undef CONFIG_I2C_MVTWSI
146 #define CONFIG_SYS_I2C
147 #define	CONFIG_SYS_I2C_SOFT	/* I2C bit-banged	*/
148 #define CONFIG_SYS_I2C_INIT_BOARD
149 
150 #define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
151 #define CONFIG_SYS_NUM_I2C_BUSES	6
152 #define CONFIG_SYS_I2C_MAX_HOPS		1
153 #define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
154 					{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
155 					{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
156 					{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
157 					{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
158 					{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
159 				}
160 
161 #ifndef __ASSEMBLY__
162 #include <asm/arch/gpio.h>
163 extern void __set_direction(unsigned pin, int high);
164 void set_sda(int state);
165 void set_scl(int state);
166 int get_sda(void);
167 int get_scl(void);
168 #define KM_KIRKWOOD_SDA_PIN	8
169 #define KM_KIRKWOOD_SCL_PIN	9
170 #define KM_KIRKWOOD_SOFT_I2C_GPIOS	0x0300
171 #define KM_KIRKWOOD_ENV_WP	38
172 
173 #define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
174 #define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
175 #define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
176 #define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
177 #define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
178 #endif
179 
180 #define I2C_DELAY	udelay(1)
181 #define I2C_SOFT_DECLARATIONS
182 
183 #define	CONFIG_SYS_I2C_SOFT_SLAVE	0x0
184 #define	CONFIG_SYS_I2C_SOFT_SPEED	100000
185 
186 /* EEprom support 24C128, 24C256 valid for environment eeprom */
187 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
188 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
189 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
190 
191 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
192 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
193 
194 /*
195  *  Environment variables configurations
196  */
197 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
198 #define CONFIG_ENV_OFFSET		0xc0000     /* no bracets! */
199 #define CONFIG_ENV_SIZE			0x02000     /* Size of Environment */
200 #define CONFIG_ENV_SECT_SIZE		0x10000
201 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
202 					CONFIG_ENV_SECT_SIZE)
203 #define CONFIG_ENV_TOTAL_SIZE		0x20000     /* no bracets! */
204 #else
205 #define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
206 #define CONFIG_ENV_EEPROM_IS_ON_I2C
207 #define CONFIG_SYS_EEPROM_WREN
208 #define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
209 #define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
210 #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */
211 #define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
212 #define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
213 #endif
214 
215 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
216 
217 
218 /* SPI bus claim MPP configuration */
219 #define CONFIG_SYS_KW_SPI_MPP	0x0
220 
221 #define FLASH_GPIO_PIN			0x00010000
222 #define KM_FLASH_GPIO_PIN	16
223 
224 #define	CONFIG_KM_UPDATE_UBOOT						\
225 	"update="							\
226 		"sf probe 0;sf erase 0 +${filesize};"			\
227 		"sf write ${load_addr_r} 0 ${filesize};\0"
228 
229 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
230 #define CONFIG_KM_NEW_ENV						\
231 	"newenv=sf probe 0;"						\
232 		"sf erase " __stringify(CONFIG_ENV_OFFSET) " "		\
233 		__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
234 #else
235 #define CONFIG_KM_NEW_ENV						\
236 	"newenv=setenv addr 0x100000 && "				\
237 		"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; "  \
238 		"mw.b ${addr} 0 4 && "					\
239 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
240 		" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "	\
241 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
242 		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
243 #endif
244 
245 #ifndef CONFIG_KM_BOARD_EXTRA_ENV
246 #define CONFIG_KM_BOARD_EXTRA_ENV       ""
247 #endif
248 
249 /*
250  * Default environment variables
251  */
252 #define CONFIG_EXTRA_ENV_SETTINGS					\
253 	CONFIG_KM_BOARD_EXTRA_ENV					\
254 	CONFIG_KM_DEF_ENV						\
255 	CONFIG_KM_NEW_ENV						\
256 	"arch=arm\0"							\
257 	""
258 
259 #if !defined(CONFIG_MTD_NOR_FLASH)
260 #undef	CONFIG_FLASH_CFI_MTD
261 #undef	CONFIG_JFFS2_CMDLINE
262 #endif
263 
264 /* additions for new relocation code, must be added to all boards */
265 #define CONFIG_SYS_SDRAM_BASE		0x00000000
266 /* Do early setups now in board_init_f() */
267 
268 /*
269  * resereved pram area at the end of memroy [hex]
270  * 8Mbytes for switch + 4Kbytes for bootcount
271  */
272 #define CONFIG_KM_RESERVED_PRAM 0x801000
273 /* address for the bootcount (taken from end of RAM) */
274 #define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
275 
276 /* enable POST tests */
277 #define CONFIG_POST	(CONFIG_SYS_POST_MEM_REGIONS)
278 #define CONFIG_POST_SKIP_ENV_FLAGS
279 #define CONFIG_POST_EXTERNAL_WORD_FUNCS
280 
281 /* we do the whole PCIe FPGA config stuff here */
282 
283 #endif /* _CONFIG_KM_ARM_H */
284