xref: /openbmc/u-boot/include/configs/km/km_arm.h (revision cd71b1d5)
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2009
4  * Marvell Semiconductor <www.marvell.com>
5  * Prafulla Wadaskar <prafulla@marvell.com>
6  *
7  * (C) Copyright 2009
8  * Stefan Roese, DENX Software Engineering, sr@denx.de.
9  *
10  * (C) Copyright 2010-2011
11  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
12  */
13 
14 /*
15  * for linking errors see
16  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
17  */
18 
19 #ifndef _CONFIG_KM_ARM_H
20 #define _CONFIG_KM_ARM_H
21 
22 /*
23  * High Level Configuration Options (easy to change)
24  */
25 #define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
26 #define CONFIG_KW88F6281		/* SOC Name */
27 
28 #define CONFIG_MACH_TYPE	MACH_TYPE_KM_KIRKWOOD
29 
30 #define CONFIG_NAND_ECC_BCH
31 
32 /* include common defines/options for all Keymile boards */
33 #include "keymile-common.h"
34 
35 /* SPI NOR Flash default params, used by sf commands */
36 #define CONFIG_SF_DEFAULT_SPEED		8100000
37 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
38 
39 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
40 #define CONFIG_ENV_SPI_BUS		0
41 #define CONFIG_ENV_SPI_CS		0
42 #define CONFIG_ENV_SPI_MAX_HZ		8100000
43 #define CONFIG_ENV_SPI_MODE		SPI_MODE_3
44 #endif
45 
46 /* Reserve 4 MB for malloc */
47 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
48 
49 #include "asm/arch/config.h"
50 
51 #define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
52 #define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
53 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
54 
55 /* pseudo-non volatile RAM [hex] */
56 #define CONFIG_KM_PNVRAM	0x80000
57 /* physical RAM MTD size [hex] */
58 #define CONFIG_KM_PHRAM		0x17F000
59 
60 #define CONFIG_KM_CRAMFS_ADDR	0x2400000
61 #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 3098KBytes */
62 #define CONFIG_KM_FDT_ADDR	0x23E0000	/*  128KBytes */
63 
64 /* architecture specific default bootargs */
65 #define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
66 		"bootcountaddr=${bootcountaddr} ${mtdparts}"		\
67 		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
68 
69 #define CONFIG_KM_DEF_ENV_CPU						\
70 	"u-boot="CONFIG_HOSTNAME "/u-boot.kwb\0"		\
71 	CONFIG_KM_UPDATE_UBOOT						\
72 	"set_fdthigh=setenv fdt_high ${kernelmem}\0"			\
73 	"checkfdt="							\
74 		"if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; "	\
75 		"then true; else setenv cramfsloadfdt true; "		\
76 		"setenv boot bootm ${load_addr_r}; "			\
77 		"echo No FDT found, booting with the kernel "		\
78 		"appended one; fi\0"					\
79 	""
80 
81 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
82 
83 /*
84  * NS16550 Configuration
85  */
86 #define CONFIG_SYS_NS16550_SERIAL
87 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
88 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
89 #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
90 #define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
91 
92 /*
93  * Serial Port configuration
94  * The following definitions let you select what serial you want to use
95  * for your console driver.
96  */
97 
98 /*
99  * For booting Linux, the board info and command line data
100  * have to be in the first 8 MB of memory, since this is
101  * the maximum mapped by the Linux kernel during initialization.
102  */
103 #define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
104 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
105 #define CONFIG_INITRD_TAG		/* enable INITRD tag */
106 #define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */
107 
108 /*
109  * NAND Flash configuration
110  */
111 #define CONFIG_SYS_MAX_NAND_DEVICE	1
112 
113 #define BOOTFLASH_START		0x0
114 
115 /* Kirkwood has two serial IF */
116 #if (CONFIG_CONS_INDEX == 2)
117 #define CONFIG_KM_CONSOLE_TTY	"ttyS1"
118 #else
119 #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
120 #endif
121 
122 /*
123  * Other required minimal configurations
124  */
125 #define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
126 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
127 
128 /*
129  * Ethernet Driver configuration
130  */
131 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
132 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
133 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
134 #define CONFIG_PHY_BASE_ADR	0
135 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
136 #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */
137 
138 /*
139  * I2C related stuff
140  */
141 #undef CONFIG_I2C_MVTWSI
142 #define CONFIG_SYS_I2C
143 #define	CONFIG_SYS_I2C_SOFT	/* I2C bit-banged	*/
144 #define CONFIG_SYS_I2C_INIT_BOARD
145 
146 #define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
147 #define CONFIG_SYS_NUM_I2C_BUSES	6
148 #define CONFIG_SYS_I2C_MAX_HOPS		1
149 #define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
150 					{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
151 					{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
152 					{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
153 					{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
154 					{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
155 				}
156 
157 #ifndef __ASSEMBLY__
158 #include <asm/arch/gpio.h>
159 extern void __set_direction(unsigned pin, int high);
160 void set_sda(int state);
161 void set_scl(int state);
162 int get_sda(void);
163 int get_scl(void);
164 #define KM_KIRKWOOD_SDA_PIN	8
165 #define KM_KIRKWOOD_SCL_PIN	9
166 #define KM_KIRKWOOD_SOFT_I2C_GPIOS	0x0300
167 #define KM_KIRKWOOD_ENV_WP	38
168 
169 #define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
170 #define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
171 #define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
172 #define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
173 #define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
174 #endif
175 
176 #define I2C_DELAY	udelay(1)
177 #define I2C_SOFT_DECLARATIONS
178 
179 #define	CONFIG_SYS_I2C_SOFT_SLAVE	0x0
180 #define	CONFIG_SYS_I2C_SOFT_SPEED	100000
181 
182 /* EEprom support 24C128, 24C256 valid for environment eeprom */
183 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
184 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
185 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
186 
187 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
188 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
189 
190 /*
191  *  Environment variables configurations
192  */
193 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
194 #define CONFIG_ENV_OFFSET		0xc0000     /* no bracets! */
195 #define CONFIG_ENV_SIZE			0x02000     /* Size of Environment */
196 #define CONFIG_ENV_SECT_SIZE		0x10000
197 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
198 					CONFIG_ENV_SECT_SIZE)
199 #define CONFIG_ENV_TOTAL_SIZE		0x20000     /* no bracets! */
200 #else
201 #define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
202 #define CONFIG_ENV_EEPROM_IS_ON_I2C
203 #define CONFIG_SYS_EEPROM_WREN
204 #define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
205 #define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
206 #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */
207 #define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
208 #define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
209 #endif
210 
211 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
212 
213 
214 /* SPI bus claim MPP configuration */
215 #define CONFIG_SYS_KW_SPI_MPP	0x0
216 
217 #define FLASH_GPIO_PIN			0x00010000
218 #define KM_FLASH_GPIO_PIN	16
219 
220 #define	CONFIG_KM_UPDATE_UBOOT						\
221 	"update="							\
222 		"sf probe 0;sf erase 0 +${filesize};"			\
223 		"sf write ${load_addr_r} 0 ${filesize};\0"
224 
225 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
226 #define CONFIG_KM_NEW_ENV						\
227 	"newenv=sf probe 0;"						\
228 		"sf erase " __stringify(CONFIG_ENV_OFFSET) " "		\
229 		__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
230 #else
231 #define CONFIG_KM_NEW_ENV						\
232 	"newenv=setenv addr 0x100000 && "				\
233 		"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; "  \
234 		"mw.b ${addr} 0 4 && "					\
235 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
236 		" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "	\
237 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
238 		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
239 #endif
240 
241 #ifndef CONFIG_KM_BOARD_EXTRA_ENV
242 #define CONFIG_KM_BOARD_EXTRA_ENV       ""
243 #endif
244 
245 /*
246  * Default environment variables
247  */
248 #define CONFIG_EXTRA_ENV_SETTINGS					\
249 	CONFIG_KM_BOARD_EXTRA_ENV					\
250 	CONFIG_KM_DEF_ENV						\
251 	CONFIG_KM_NEW_ENV						\
252 	"arch=arm\0"							\
253 	""
254 
255 #if !defined(CONFIG_MTD_NOR_FLASH)
256 #undef	CONFIG_JFFS2_CMDLINE
257 #endif
258 
259 /* additions for new relocation code, must be added to all boards */
260 #define CONFIG_SYS_SDRAM_BASE		0x00000000
261 /* Do early setups now in board_init_f() */
262 
263 /*
264  * resereved pram area at the end of memroy [hex]
265  * 8Mbytes for switch + 4Kbytes for bootcount
266  */
267 #define CONFIG_KM_RESERVED_PRAM 0x801000
268 /* address for the bootcount (taken from end of RAM) */
269 #define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
270 
271 /* enable POST tests */
272 #define CONFIG_POST	(CONFIG_SYS_POST_MEM_REGIONS)
273 #define CONFIG_POST_SKIP_ENV_FLAGS
274 #define CONFIG_POST_EXTERNAL_WORD_FUNCS
275 
276 /* we do the whole PCIe FPGA config stuff here */
277 
278 #endif /* _CONFIG_KM_ARM_H */
279