1 /* 2 * (C) Copyright 2009 3 * Marvell Semiconductor <www.marvell.com> 4 * Prafulla Wadaskar <prafulla@marvell.com> 5 * 6 * (C) Copyright 2009 7 * Stefan Roese, DENX Software Engineering, sr@denx.de. 8 * 9 * (C) Copyright 2010-2011 10 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 /* 16 * for linking errors see 17 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 18 */ 19 20 #ifndef _CONFIG_KM_ARM_H 21 #define _CONFIG_KM_ARM_H 22 23 /* 24 * High Level Configuration Options (easy to change) 25 */ 26 #define CONFIG_MARVELL 27 #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ 28 #define CONFIG_KW88F6281 /* SOC Name */ 29 30 #define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD 31 32 #define CONFIG_NAND_ECC_BCH 33 34 /* include common defines/options for all Keymile boards */ 35 #include "keymile-common.h" 36 37 /* SPI NOR Flash default params, used by sf commands */ 38 #define CONFIG_SF_DEFAULT_SPEED 8100000 39 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 40 41 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 42 #define CONFIG_ENV_SPI_BUS 0 43 #define CONFIG_ENV_SPI_CS 0 44 #define CONFIG_ENV_SPI_MAX_HZ 8100000 45 #define CONFIG_ENV_SPI_MODE SPI_MODE_3 46 #endif 47 48 /* Reserve 4 MB for malloc */ 49 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 50 51 #include "asm/arch/config.h" 52 53 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ 54 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ 55 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 56 57 /* pseudo-non volatile RAM [hex] */ 58 #define CONFIG_KM_PNVRAM 0x80000 59 /* physical RAM MTD size [hex] */ 60 #define CONFIG_KM_PHRAM 0x17F000 61 62 #define CONFIG_KM_CRAMFS_ADDR 0x2400000 63 #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */ 64 #define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */ 65 66 /* architecture specific default bootargs */ 67 #define CONFIG_KM_DEF_BOOT_ARGS_CPU \ 68 "bootcountaddr=${bootcountaddr} ${mtdparts}" \ 69 " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}" 70 71 #define CONFIG_KM_DEF_ENV_CPU \ 72 "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ 73 CONFIG_KM_UPDATE_UBOOT \ 74 "set_fdthigh=setenv fdt_high ${kernelmem}\0" \ 75 "checkfdt=" \ 76 "if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; " \ 77 "then true; else setenv cramfsloadfdt true; " \ 78 "setenv boot bootm ${load_addr_r}; " \ 79 "echo No FDT found, booting with the kernel " \ 80 "appended one; fi\0" \ 81 "" 82 83 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 84 #define CONFIG_MISC_INIT_R 85 86 /* 87 * NS16550 Configuration 88 */ 89 #define CONFIG_SYS_NS16550_SERIAL 90 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 91 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 92 #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE 93 #define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE 94 95 /* 96 * Serial Port configuration 97 * The following definitions let you select what serial you want to use 98 * for your console driver. 99 */ 100 101 #define CONFIG_CONS_INDEX 1 /* Console on UART0 */ 102 103 /* 104 * For booting Linux, the board info and command line data 105 * have to be in the first 8 MB of memory, since this is 106 * the maximum mapped by the Linux kernel during initialization. 107 */ 108 #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ 109 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 110 #define CONFIG_INITRD_TAG /* enable INITRD tag */ 111 #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 112 113 /* 114 * NAND Flash configuration 115 */ 116 #define CONFIG_SYS_MAX_NAND_DEVICE 1 117 118 #define BOOTFLASH_START 0x0 119 120 /* Kirkwood has two serial IF */ 121 #if (CONFIG_CONS_INDEX == 2) 122 #define CONFIG_KM_CONSOLE_TTY "ttyS1" 123 #else 124 #define CONFIG_KM_CONSOLE_TTY "ttyS0" 125 #endif 126 127 /* 128 * Other required minimal configurations 129 */ 130 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 131 #define CONFIG_NR_DRAM_BANKS 4 132 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 133 134 /* 135 * Ethernet Driver configuration 136 */ 137 #define CONFIG_NETCONSOLE /* include NetConsole support */ 138 #define CONFIG_MII /* expose smi ove miiphy interface */ 139 #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ 140 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ 141 #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ 142 #define CONFIG_PHY_BASE_ADR 0 143 #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 144 #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */ 145 146 /* 147 * I2C related stuff 148 */ 149 #undef CONFIG_I2C_MVTWSI 150 #define CONFIG_SYS_I2C 151 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 152 #define CONFIG_SYS_I2C_INIT_BOARD 153 154 #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ 155 #define CONFIG_SYS_NUM_I2C_BUSES 6 156 #define CONFIG_SYS_I2C_MAX_HOPS 1 157 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ 158 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ 159 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ 160 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ 161 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ 162 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ 163 } 164 165 #ifndef __ASSEMBLY__ 166 #include <asm/arch/gpio.h> 167 extern void __set_direction(unsigned pin, int high); 168 void set_sda(int state); 169 void set_scl(int state); 170 int get_sda(void); 171 int get_scl(void); 172 #define KM_KIRKWOOD_SDA_PIN 8 173 #define KM_KIRKWOOD_SCL_PIN 9 174 #define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300 175 #define KM_KIRKWOOD_ENV_WP 38 176 177 #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) 178 #define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) 179 #define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) 180 #define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) 181 #define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) 182 #endif 183 184 #define I2C_DELAY udelay(1) 185 #define I2C_SOFT_DECLARATIONS 186 187 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x0 188 #define CONFIG_SYS_I2C_SOFT_SPEED 100000 189 190 /* EEprom support 24C128, 24C256 valid for environment eeprom */ 191 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE 192 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */ 193 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 194 195 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 196 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 197 198 /* 199 * Environment variables configurations 200 */ 201 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 202 #define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */ 203 #define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */ 204 #define CONFIG_ENV_SECT_SIZE 0x10000 205 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 206 CONFIG_ENV_SECT_SIZE) 207 #define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */ 208 #else 209 #define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 210 #define CONFIG_ENV_EEPROM_IS_ON_I2C 211 #define CONFIG_SYS_EEPROM_WREN 212 #define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ 213 #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) 214 #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */ 215 #define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ 216 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 217 #endif 218 219 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 220 221 222 /* SPI bus claim MPP configuration */ 223 #define CONFIG_SYS_KW_SPI_MPP 0x0 224 225 #define FLASH_GPIO_PIN 0x00010000 226 #define KM_FLASH_GPIO_PIN 16 227 228 #define CONFIG_KM_UPDATE_UBOOT \ 229 "update=" \ 230 "sf probe 0;sf erase 0 +${filesize};" \ 231 "sf write ${load_addr_r} 0 ${filesize};\0" 232 233 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 234 #define CONFIG_KM_NEW_ENV \ 235 "newenv=sf probe 0;" \ 236 "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \ 237 __stringify(CONFIG_ENV_TOTAL_SIZE)"\0" 238 #else 239 #define CONFIG_KM_NEW_ENV \ 240 "newenv=setenv addr 0x100000 && " \ 241 "i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \ 242 "mw.b ${addr} 0 4 && " \ 243 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 244 " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \ 245 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 246 " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0" 247 #endif 248 249 #ifndef CONFIG_KM_BOARD_EXTRA_ENV 250 #define CONFIG_KM_BOARD_EXTRA_ENV "" 251 #endif 252 253 /* 254 * Default environment variables 255 */ 256 #define CONFIG_EXTRA_ENV_SETTINGS \ 257 CONFIG_KM_BOARD_EXTRA_ENV \ 258 CONFIG_KM_DEF_ENV \ 259 CONFIG_KM_NEW_ENV \ 260 "arch=arm\0" \ 261 "" 262 263 #if !defined(CONFIG_MTD_NOR_FLASH) 264 #undef CONFIG_FLASH_CFI_MTD 265 #undef CONFIG_JFFS2_CMDLINE 266 #endif 267 268 /* additions for new relocation code, must be added to all boards */ 269 #define CONFIG_SYS_SDRAM_BASE 0x00000000 270 /* Do early setups now in board_init_f() */ 271 272 /* 273 * resereved pram area at the end of memroy [hex] 274 * 8Mbytes for switch + 4Kbytes for bootcount 275 */ 276 #define CONFIG_KM_RESERVED_PRAM 0x801000 277 /* address for the bootcount (taken from end of RAM) */ 278 #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) 279 /* Use generic bootcount RAM driver */ 280 #define CONFIG_BOOTCOUNT_RAM 281 282 /* enable POST tests */ 283 #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) 284 #define CONFIG_POST_SKIP_ENV_FLAGS 285 #define CONFIG_POST_EXTERNAL_WORD_FUNCS 286 287 /* we do the whole PCIe FPGA config stuff here */ 288 289 #endif /* _CONFIG_KM_ARM_H */ 290