xref: /openbmc/u-boot/include/configs/km/km_arm.h (revision b24a8ec1)
1 /*
2  * (C) Copyright 2009
3  * Marvell Semiconductor <www.marvell.com>
4  * Prafulla Wadaskar <prafulla@marvell.com>
5  *
6  * (C) Copyright 2009
7  * Stefan Roese, DENX Software Engineering, sr@denx.de.
8  *
9  * (C) Copyright 2010-2011
10  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
11  *
12  * SPDX-License-Identifier:	GPL-2.0+
13  */
14 
15 /*
16  * for linking errors see
17  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
18  */
19 
20 #ifndef _CONFIG_KM_ARM_H
21 #define _CONFIG_KM_ARM_H
22 
23 /*
24  * High Level Configuration Options (easy to change)
25  */
26 #define CONFIG_MARVELL
27 #define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
28 #define CONFIG_KW88F6281		/* SOC Name */
29 #define CONFIG_MACH_KM_KIRKWOOD		/* Machine type */
30 
31 #define CONFIG_MACH_TYPE	MACH_TYPE_KM_KIRKWOOD
32 
33 #define CONFIG_NAND_ECC_BCH
34 #define CONFIG_BCH
35 
36 /* include common defines/options for all Keymile boards */
37 #include "keymile-common.h"
38 
39 #define CONFIG_CMD_NAND
40 
41 /* SPI NOR Flash default params, used by sf commands */
42 #define CONFIG_SF_DEFAULT_SPEED		8100000
43 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
44 
45 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
46 #define CONFIG_ENV_SPI_BUS		0
47 #define CONFIG_ENV_SPI_CS		0
48 #define CONFIG_ENV_SPI_MAX_HZ		8100000
49 #define CONFIG_ENV_SPI_MODE		SPI_MODE_3
50 #endif
51 
52 /* Reserve 4 MB for malloc */
53 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
54 
55 #include "asm/arch/config.h"
56 
57 #define CONFIG_SYS_TEXT_BASE	0x07d00000	/* code address before reloc */
58 #define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
59 #define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
60 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
61 
62 /* pseudo-non volatile RAM [hex] */
63 #define CONFIG_KM_PNVRAM	0x80000
64 /* physical RAM MTD size [hex] */
65 #define CONFIG_KM_PHRAM		0x17F000
66 
67 #define CONFIG_KM_CRAMFS_ADDR	0x2400000
68 #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 3098KBytes */
69 #define CONFIG_KM_FDT_ADDR	0x23E0000	/*  128KBytes */
70 
71 /* architecture specific default bootargs */
72 #define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
73 		"bootcountaddr=${bootcountaddr} ${mtdparts}"		\
74 		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
75 
76 #define CONFIG_KM_DEF_ENV_CPU						\
77 	"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0"		\
78 	CONFIG_KM_UPDATE_UBOOT						\
79 	"set_fdthigh=setenv fdt_high ${kernelmem}\0"			\
80 	"checkfdt="							\
81 		"if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; "	\
82 		"then true; else setenv cramfsloadfdt true; "		\
83 		"setenv boot bootm ${load_addr_r}; "			\
84 		"echo No FDT found, booting with the kernel "		\
85 		"appended one; fi\0"					\
86 	""
87 
88 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
89 #define CONFIG_MISC_INIT_R
90 
91 /*
92  * NS16550 Configuration
93  */
94 #define CONFIG_SYS_NS16550_SERIAL
95 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
96 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
97 #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
98 #define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
99 
100 /*
101  * Serial Port configuration
102  * The following definitions let you select what serial you want to use
103  * for your console driver.
104  */
105 
106 #define CONFIG_CONS_INDEX	1	/* Console on UART0 */
107 
108 /*
109  * For booting Linux, the board info and command line data
110  * have to be in the first 8 MB of memory, since this is
111  * the maximum mapped by the Linux kernel during initialization.
112  */
113 #define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
114 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
115 #define CONFIG_INITRD_TAG		/* enable INITRD tag */
116 #define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */
117 
118 /*
119  * Commands configuration
120  */
121 #define CONFIG_CMD_MTDPARTS
122 
123 /*
124  * NAND Flash configuration
125  */
126 #define CONFIG_SYS_MAX_NAND_DEVICE	1
127 
128 #define BOOTFLASH_START		0x0
129 
130 /* Kirkwood has two serial IF */
131 #if (CONFIG_CONS_INDEX == 2)
132 #define CONFIG_KM_CONSOLE_TTY	"ttyS1"
133 #else
134 #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
135 #endif
136 
137 /*
138  * Other required minimal configurations
139  */
140 #define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
141 #define CONFIG_NR_DRAM_BANKS	4
142 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
143 
144 /*
145  * Ethernet Driver configuration
146  */
147 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
148 #define CONFIG_MII		/* expose smi ove miiphy interface */
149 #define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
150 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
151 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
152 #define CONFIG_PHY_BASE_ADR	0
153 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
154 #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */
155 
156 /*
157  * UBI related stuff
158  */
159 #define CONFIG_SYS_USE_UBI
160 
161 /*
162  * I2C related stuff
163  */
164 #undef CONFIG_I2C_MVTWSI
165 #define CONFIG_SYS_I2C
166 #define	CONFIG_SYS_I2C_SOFT	/* I2C bit-banged	*/
167 #define CONFIG_SYS_I2C_INIT_BOARD
168 
169 #define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
170 #define CONFIG_SYS_NUM_I2C_BUSES	6
171 #define CONFIG_SYS_I2C_MAX_HOPS		1
172 #define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
173 					{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
174 					{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
175 					{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
176 					{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
177 					{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
178 				}
179 
180 #ifndef __ASSEMBLY__
181 #include <asm/arch/gpio.h>
182 extern void __set_direction(unsigned pin, int high);
183 void set_sda(int state);
184 void set_scl(int state);
185 int get_sda(void);
186 int get_scl(void);
187 #define KM_KIRKWOOD_SDA_PIN	8
188 #define KM_KIRKWOOD_SCL_PIN	9
189 #define KM_KIRKWOOD_SOFT_I2C_GPIOS	0x0300
190 #define KM_KIRKWOOD_ENV_WP	38
191 
192 #define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
193 #define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
194 #define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
195 #define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
196 #define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
197 #endif
198 
199 #define I2C_DELAY	udelay(1)
200 #define I2C_SOFT_DECLARATIONS
201 
202 #define	CONFIG_SYS_I2C_SOFT_SLAVE	0x0
203 #define	CONFIG_SYS_I2C_SOFT_SPEED	100000
204 
205 /* EEprom support 24C128, 24C256 valid for environment eeprom */
206 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
207 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
208 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
209 
210 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
211 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
212 
213 /*
214  *  Environment variables configurations
215  */
216 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
217 #define CONFIG_ENV_IS_IN_SPI_FLASH  /* use SPI-Flash for environment vars */
218 #define CONFIG_ENV_OFFSET		0xc0000     /* no bracets! */
219 #define CONFIG_ENV_SIZE			0x02000     /* Size of Environment */
220 #define CONFIG_ENV_SECT_SIZE		0x10000
221 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
222 					CONFIG_ENV_SECT_SIZE)
223 #define CONFIG_ENV_TOTAL_SIZE		0x20000     /* no bracets! */
224 #else
225 #define CONFIG_ENV_IS_IN_EEPROM		/* use EEPROM for environment vars */
226 #define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
227 #define CONFIG_ENV_EEPROM_IS_ON_I2C
228 #define CONFIG_SYS_EEPROM_WREN
229 #define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
230 #define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
231 #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */
232 #define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
233 #define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
234 #endif
235 
236 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
237 
238 
239 /* SPI bus claim MPP configuration */
240 #define CONFIG_SYS_KW_SPI_MPP	0x0
241 
242 #define FLASH_GPIO_PIN			0x00010000
243 #define KM_FLASH_GPIO_PIN	16
244 
245 #ifndef MTDIDS_DEFAULT
246 # define MTDIDS_DEFAULT		"nand0=orion_nand"
247 #endif /* MTDIDS_DEFAULT */
248 
249 #ifndef MTDPARTS_DEFAULT
250 # define MTDPARTS_DEFAULT	"mtdparts="			\
251 	"orion_nand:"						\
252 		"-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
253 #endif /* MTDPARTS_DEFAULT */
254 
255 #define	CONFIG_KM_UPDATE_UBOOT						\
256 	"update="							\
257 		"sf probe 0;sf erase 0 +${filesize};"			\
258 		"sf write ${load_addr_r} 0 ${filesize};\0"
259 
260 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
261 #define CONFIG_KM_NEW_ENV						\
262 	"newenv=sf probe 0;"						\
263 		"sf erase " __stringify(CONFIG_ENV_OFFSET) " "		\
264 		__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
265 #else
266 #define CONFIG_KM_NEW_ENV						\
267 	"newenv=setenv addr 0x100000 && "				\
268 		"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; "  \
269 		"mw.b ${addr} 0 4 && "					\
270 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
271 		" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "	\
272 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
273 		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
274 #endif
275 
276 #ifndef CONFIG_KM_BOARD_EXTRA_ENV
277 #define CONFIG_KM_BOARD_EXTRA_ENV       ""
278 #endif
279 
280 /*
281  * Default environment variables
282  */
283 #define CONFIG_EXTRA_ENV_SETTINGS					\
284 	CONFIG_KM_BOARD_EXTRA_ENV					\
285 	CONFIG_KM_DEF_ENV						\
286 	CONFIG_KM_NEW_ENV						\
287 	"arch=arm\0"							\
288 	""
289 
290 #if !defined(CONFIG_MTD_NOR_FLASH)
291 #undef	CONFIG_FLASH_CFI_MTD
292 #undef	CONFIG_JFFS2_CMDLINE
293 #endif
294 
295 /* additions for new relocation code, must be added to all boards */
296 #define CONFIG_SYS_SDRAM_BASE		0x00000000
297 /* Do early setups now in board_init_f() */
298 
299 /*
300  * resereved pram area at the end of memroy [hex]
301  * 8Mbytes for switch + 4Kbytes for bootcount
302  */
303 #define CONFIG_KM_RESERVED_PRAM 0x801000
304 /* address for the bootcount (taken from end of RAM) */
305 #define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
306 /* Use generic bootcount RAM driver */
307 #define CONFIG_BOOTCOUNT_RAM
308 
309 /* enable POST tests */
310 #define CONFIG_POST	(CONFIG_SYS_POST_MEM_REGIONS)
311 #define CONFIG_POST_SKIP_ENV_FLAGS
312 #define CONFIG_POST_EXTERNAL_WORD_FUNCS
313 
314 /* we do the whole PCIe FPGA config stuff here */
315 
316 #endif /* _CONFIG_KM_ARM_H */
317