1 /* 2 * (C) Copyright 2009 3 * Marvell Semiconductor <www.marvell.com> 4 * Prafulla Wadaskar <prafulla@marvell.com> 5 * 6 * (C) Copyright 2009 7 * Stefan Roese, DENX Software Engineering, sr@denx.de. 8 * 9 * (C) Copyright 2010-2011 10 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 28 * MA 02110-1301 USA 29 */ 30 31 /* 32 * for linking errors see 33 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 34 */ 35 36 #ifndef _CONFIG_KM_ARM_H 37 #define _CONFIG_KM_ARM_H 38 39 /* We got removed from Linux mach-types.h */ 40 #define MACH_TYPE_KM_KIRKWOOD 2255 41 42 /* 43 * High Level Configuration Options (easy to change) 44 */ 45 #define CONFIG_MARVELL 46 #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ 47 #define CONFIG_KIRKWOOD /* SOC Family Name */ 48 #define CONFIG_KW88F6281 /* SOC Name */ 49 #define CONFIG_MACH_KM_KIRKWOOD /* Machine type */ 50 51 #define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD 52 53 /* include common defines/options for all Keymile boards */ 54 #include "keymile-common.h" 55 56 #define CONFIG_CMD_NAND 57 #define CONFIG_CMD_SF 58 #define CONFIG_SOFT_I2C /* I2C bit-banged */ 59 60 #include "asm/arch/config.h" 61 62 #define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */ 63 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ 64 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ 65 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 66 67 /* pseudo-non volatile RAM [hex] */ 68 #define CONFIG_KM_PNVRAM 0x80000 69 /* physical RAM MTD size [hex] */ 70 #define CONFIG_KM_PHRAM 0x17F000 71 72 #define CONFIG_KM_CRAMFS_ADDR 0x2400000 73 #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 4096KBytes */ 74 75 /* architecture specific default bootargs */ 76 #define CONFIG_KM_DEF_BOOT_ARGS_CPU \ 77 "bootcountaddr=${bootcountaddr} ${mtdparts}" \ 78 " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}" 79 80 #define CONFIG_KM_DEF_ENV_CPU \ 81 "boot=bootm ${load_addr_r} - -\0" \ 82 "cramfsloadfdt=true\0" \ 83 "u-boot="xstr(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ 84 CONFIG_KM_DEF_ENV_UPDATE \ 85 "" 86 87 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 88 #define CONFIG_MISC_INIT_R 89 90 /* 91 * NS16550 Configuration 92 */ 93 #define CONFIG_SYS_NS16550 94 #define CONFIG_SYS_NS16550_SERIAL 95 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 96 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 97 #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE 98 #define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE 99 100 /* 101 * Serial Port configuration 102 * The following definitions let you select what serial you want to use 103 * for your console driver. 104 */ 105 106 #define CONFIG_CONS_INDEX 1 /* Console on UART0 */ 107 108 /* 109 * For booting Linux, the board info and command line data 110 * have to be in the first 8 MB of memory, since this is 111 * the maximum mapped by the Linux kernel during initialization. 112 */ 113 #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ 114 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 115 #define CONFIG_INITRD_TAG /* enable INITRD tag */ 116 #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 117 118 /* 119 * Commands configuration 120 */ 121 #define CONFIG_CMD_ELF 122 #define CONFIG_CMD_MTDPARTS 123 #define CONFIG_CMD_NFS 124 125 /* 126 * Without NOR FLASH we need this 127 */ 128 #define CONFIG_SYS_NO_FLASH 129 #undef CONFIG_CMD_FLASH 130 #undef CONFIG_CMD_IMLS 131 132 /* 133 * NAND Flash configuration 134 */ 135 #define CONFIG_SYS_MAX_NAND_DEVICE 1 136 #define NAND_MAX_CHIPS 1 137 138 #define BOOTFLASH_START 0x0 139 140 /* Kirkwood has two serial IF */ 141 #if (CONFIG_CONS_INDEX == 2) 142 #define CONFIG_KM_CONSOLE_TTY "ttyS1" 143 #else 144 #define CONFIG_KM_CONSOLE_TTY "ttyS0" 145 #endif 146 147 /* 148 * Other required minimal configurations 149 */ 150 #define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ 151 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 152 #define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */ 153 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */ 154 #define CONFIG_NR_DRAM_BANKS 4 155 #define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */ 156 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 157 158 /* 159 * Ethernet Driver configuration 160 */ 161 #define CONFIG_NETCONSOLE /* include NetConsole support */ 162 #define CONFIG_MII /* expose smi ove miiphy interface */ 163 #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ 164 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ 165 #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ 166 #define CONFIG_PHY_BASE_ADR 0 167 #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 168 #define CONFIG_RESET_PHY_R /* use reset_phy() to init 88E1118 PHY */ 169 170 /* 171 * UBI related stuff 172 */ 173 #define CONFIG_SYS_USE_UBI 174 175 /* 176 * I2C related stuff 177 */ 178 #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ 179 #if defined(CONFIG_SOFT_I2C) 180 #ifndef __ASSEMBLY__ 181 #include <asm/arch-kirkwood/gpio.h> 182 extern void __set_direction(unsigned pin, int high); 183 void set_sda(int state); 184 void set_scl(int state); 185 int get_sda(void); 186 int get_scl(void); 187 #define KM_KIRKWOOD_SDA_PIN 8 188 #define KM_KIRKWOOD_SCL_PIN 9 189 #define KM_KIRKWOOD_ENV_WP 38 190 191 #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) 192 #define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) 193 #define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) 194 #define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) 195 #define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) 196 #endif 197 198 #define I2C_DELAY udelay(3) /* 1/4 I2C clock duration */ 199 #define I2C_SOFT_DECLARATIONS 200 201 #endif 202 203 /* EEprom support 24C128, 24C256 valid for environment eeprom */ 204 #define CONFIG_SYS_I2C_MULTI_EEPROMS 205 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE 206 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */ 207 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 208 209 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 210 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 211 212 /* 213 * Environment variables configurations 214 */ 215 #define CONFIG_ENV_IS_IN_EEPROM /* use EEPROM for environment vars */ 216 #define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 217 #define CONFIG_ENV_EEPROM_IS_ON_I2C 218 #define CONFIG_SYS_EEPROM_WREN 219 #define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ 220 #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) 221 #define CONFIG_I2C_ENV_EEPROM_BUS KM_ENV_BUS "\0" 222 223 /* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */ 224 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 225 #define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ 226 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 227 228 #define CONFIG_SPI_FLASH 229 #define CONFIG_SPI_FLASH_STMICRO 230 231 #define FLASH_GPIO_PIN 0x00010000 232 233 #define MTDIDS_DEFAULT "nand0=orion_nand" 234 /* test-only: partitioning needs some tuning, this is just for tests */ 235 #define MTDPARTS_DEFAULT "mtdparts=" \ 236 "orion_nand:" \ 237 "-(" CONFIG_KM_UBI_PARTITION_NAME ")" 238 239 #define CONFIG_KM_DEF_ENV_UPDATE \ 240 "update=" \ 241 "spi on;sf probe 0;sf erase 0 50000;" \ 242 "sf write ${load_addr_r} 0 ${filesize};" \ 243 "spi off\0" 244 245 /* 246 * Default environment variables 247 */ 248 #define CONFIG_EXTRA_ENV_SETTINGS \ 249 CONFIG_KM_DEF_ENV \ 250 "newenv=setenv addr 0x100000 && " \ 251 "i2c dev 1; mw.b ${addr} 0 4 && " \ 252 "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \ 253 " ${addr} " xstr(CONFIG_ENV_OFFSET) " 4 && " \ 254 "eeprom write " xstr(CONFIG_SYS_DEF_EEPROM_ADDR) \ 255 " ${addr} " xstr(CONFIG_ENV_OFFSET_REDUND) " 4\0" \ 256 "arch=arm\0" \ 257 "EEprom_ivm=" KM_IVM_BUS "\0" \ 258 "" 259 260 #if defined(CONFIG_SYS_NO_FLASH) 261 #define CONFIG_KM_UBI_PARTITION_NAME "ubi0" 262 #undef CONFIG_FLASH_CFI_MTD 263 #undef CONFIG_JFFS2_CMDLINE 264 #endif 265 266 /* additions for new relocation code, must be added to all boards */ 267 #define CONFIG_SYS_SDRAM_BASE 0x00000000 268 /* Do early setups now in board_init_f() */ 269 #define CONFIG_BOARD_EARLY_INIT_F 270 271 /* 272 * resereved pram area at the end of memroy [hex] 273 * 8Mbytes for switch + 4Kbytes for bootcount 274 */ 275 #define CONFIG_KM_RESERVED_PRAM 0x801000 276 /* address for the bootcount (taken from end of RAM) */ 277 #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) 278 279 /* enable POST tests */ 280 #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) 281 #define CONFIG_POST_SKIP_ENV_FLAGS 282 #define CONFIG_POST_EXTERNAL_WORD_FUNCS 283 #define CONFIG_CMD_DIAG 284 285 #endif /* _CONFIG_KM_ARM_H */ 286