1 /* 2 * (C) Copyright 2009 3 * Marvell Semiconductor <www.marvell.com> 4 * Prafulla Wadaskar <prafulla@marvell.com> 5 * 6 * (C) Copyright 2009 7 * Stefan Roese, DENX Software Engineering, sr@denx.de. 8 * 9 * (C) Copyright 2010-2011 10 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 /* 16 * for linking errors see 17 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 18 */ 19 20 #ifndef _CONFIG_KM_ARM_H 21 #define _CONFIG_KM_ARM_H 22 23 /* 24 * High Level Configuration Options (easy to change) 25 */ 26 #define CONFIG_MARVELL 27 #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ 28 #define CONFIG_KW88F6281 /* SOC Name */ 29 #define CONFIG_MACH_KM_KIRKWOOD /* Machine type */ 30 31 #define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD 32 33 #define CONFIG_NAND_ECC_BCH 34 35 /* include common defines/options for all Keymile boards */ 36 #include "keymile-common.h" 37 38 /* SPI NOR Flash default params, used by sf commands */ 39 #define CONFIG_SF_DEFAULT_SPEED 8100000 40 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 41 42 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 43 #define CONFIG_ENV_SPI_BUS 0 44 #define CONFIG_ENV_SPI_CS 0 45 #define CONFIG_ENV_SPI_MAX_HZ 8100000 46 #define CONFIG_ENV_SPI_MODE SPI_MODE_3 47 #endif 48 49 /* Reserve 4 MB for malloc */ 50 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 51 52 #include "asm/arch/config.h" 53 54 #define CONFIG_SYS_TEXT_BASE 0x07d00000 /* code address before reloc */ 55 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ 56 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ 57 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 58 59 /* pseudo-non volatile RAM [hex] */ 60 #define CONFIG_KM_PNVRAM 0x80000 61 /* physical RAM MTD size [hex] */ 62 #define CONFIG_KM_PHRAM 0x17F000 63 64 #define CONFIG_KM_CRAMFS_ADDR 0x2400000 65 #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */ 66 #define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */ 67 68 /* architecture specific default bootargs */ 69 #define CONFIG_KM_DEF_BOOT_ARGS_CPU \ 70 "bootcountaddr=${bootcountaddr} ${mtdparts}" \ 71 " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}" 72 73 #define CONFIG_KM_DEF_ENV_CPU \ 74 "u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0" \ 75 CONFIG_KM_UPDATE_UBOOT \ 76 "set_fdthigh=setenv fdt_high ${kernelmem}\0" \ 77 "checkfdt=" \ 78 "if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; " \ 79 "then true; else setenv cramfsloadfdt true; " \ 80 "setenv boot bootm ${load_addr_r}; " \ 81 "echo No FDT found, booting with the kernel " \ 82 "appended one; fi\0" \ 83 "" 84 85 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 86 #define CONFIG_MISC_INIT_R 87 88 /* 89 * NS16550 Configuration 90 */ 91 #define CONFIG_SYS_NS16550_SERIAL 92 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 93 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 94 #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE 95 #define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE 96 97 /* 98 * Serial Port configuration 99 * The following definitions let you select what serial you want to use 100 * for your console driver. 101 */ 102 103 #define CONFIG_CONS_INDEX 1 /* Console on UART0 */ 104 105 /* 106 * For booting Linux, the board info and command line data 107 * have to be in the first 8 MB of memory, since this is 108 * the maximum mapped by the Linux kernel during initialization. 109 */ 110 #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ 111 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 112 #define CONFIG_INITRD_TAG /* enable INITRD tag */ 113 #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 114 115 /* 116 * NAND Flash configuration 117 */ 118 #define CONFIG_SYS_MAX_NAND_DEVICE 1 119 120 #define BOOTFLASH_START 0x0 121 122 /* Kirkwood has two serial IF */ 123 #if (CONFIG_CONS_INDEX == 2) 124 #define CONFIG_KM_CONSOLE_TTY "ttyS1" 125 #else 126 #define CONFIG_KM_CONSOLE_TTY "ttyS0" 127 #endif 128 129 /* 130 * Other required minimal configurations 131 */ 132 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 133 #define CONFIG_NR_DRAM_BANKS 4 134 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 135 136 /* 137 * Ethernet Driver configuration 138 */ 139 #define CONFIG_NETCONSOLE /* include NetConsole support */ 140 #define CONFIG_MII /* expose smi ove miiphy interface */ 141 #define CONFIG_MVGBE /* Enable Marvell Gbe Controller Driver */ 142 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ 143 #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ 144 #define CONFIG_PHY_BASE_ADR 0 145 #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 146 #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */ 147 148 /* 149 * I2C related stuff 150 */ 151 #undef CONFIG_I2C_MVTWSI 152 #define CONFIG_SYS_I2C 153 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 154 #define CONFIG_SYS_I2C_INIT_BOARD 155 156 #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ 157 #define CONFIG_SYS_NUM_I2C_BUSES 6 158 #define CONFIG_SYS_I2C_MAX_HOPS 1 159 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ 160 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ 161 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ 162 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ 163 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ 164 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ 165 } 166 167 #ifndef __ASSEMBLY__ 168 #include <asm/arch/gpio.h> 169 extern void __set_direction(unsigned pin, int high); 170 void set_sda(int state); 171 void set_scl(int state); 172 int get_sda(void); 173 int get_scl(void); 174 #define KM_KIRKWOOD_SDA_PIN 8 175 #define KM_KIRKWOOD_SCL_PIN 9 176 #define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300 177 #define KM_KIRKWOOD_ENV_WP 38 178 179 #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) 180 #define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) 181 #define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) 182 #define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) 183 #define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) 184 #endif 185 186 #define I2C_DELAY udelay(1) 187 #define I2C_SOFT_DECLARATIONS 188 189 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x0 190 #define CONFIG_SYS_I2C_SOFT_SPEED 100000 191 192 /* EEprom support 24C128, 24C256 valid for environment eeprom */ 193 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE 194 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */ 195 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 196 197 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 198 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 199 200 /* 201 * Environment variables configurations 202 */ 203 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 204 #define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */ 205 #define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */ 206 #define CONFIG_ENV_SECT_SIZE 0x10000 207 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 208 CONFIG_ENV_SECT_SIZE) 209 #define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */ 210 #else 211 #define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 212 #define CONFIG_ENV_EEPROM_IS_ON_I2C 213 #define CONFIG_SYS_EEPROM_WREN 214 #define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ 215 #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) 216 #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */ 217 #define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ 218 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 219 #endif 220 221 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 222 223 224 /* SPI bus claim MPP configuration */ 225 #define CONFIG_SYS_KW_SPI_MPP 0x0 226 227 #define FLASH_GPIO_PIN 0x00010000 228 #define KM_FLASH_GPIO_PIN 16 229 230 #ifndef MTDIDS_DEFAULT 231 # define MTDIDS_DEFAULT "nand0=orion_nand" 232 #endif /* MTDIDS_DEFAULT */ 233 234 #ifndef MTDPARTS_DEFAULT 235 # define MTDPARTS_DEFAULT "mtdparts=" \ 236 "orion_nand:" \ 237 "-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");" 238 #endif /* MTDPARTS_DEFAULT */ 239 240 #define CONFIG_KM_UPDATE_UBOOT \ 241 "update=" \ 242 "sf probe 0;sf erase 0 +${filesize};" \ 243 "sf write ${load_addr_r} 0 ${filesize};\0" 244 245 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 246 #define CONFIG_KM_NEW_ENV \ 247 "newenv=sf probe 0;" \ 248 "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \ 249 __stringify(CONFIG_ENV_TOTAL_SIZE)"\0" 250 #else 251 #define CONFIG_KM_NEW_ENV \ 252 "newenv=setenv addr 0x100000 && " \ 253 "i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \ 254 "mw.b ${addr} 0 4 && " \ 255 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 256 " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \ 257 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 258 " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0" 259 #endif 260 261 #ifndef CONFIG_KM_BOARD_EXTRA_ENV 262 #define CONFIG_KM_BOARD_EXTRA_ENV "" 263 #endif 264 265 /* 266 * Default environment variables 267 */ 268 #define CONFIG_EXTRA_ENV_SETTINGS \ 269 CONFIG_KM_BOARD_EXTRA_ENV \ 270 CONFIG_KM_DEF_ENV \ 271 CONFIG_KM_NEW_ENV \ 272 "arch=arm\0" \ 273 "" 274 275 #if !defined(CONFIG_MTD_NOR_FLASH) 276 #undef CONFIG_FLASH_CFI_MTD 277 #undef CONFIG_JFFS2_CMDLINE 278 #endif 279 280 /* additions for new relocation code, must be added to all boards */ 281 #define CONFIG_SYS_SDRAM_BASE 0x00000000 282 /* Do early setups now in board_init_f() */ 283 284 /* 285 * resereved pram area at the end of memroy [hex] 286 * 8Mbytes for switch + 4Kbytes for bootcount 287 */ 288 #define CONFIG_KM_RESERVED_PRAM 0x801000 289 /* address for the bootcount (taken from end of RAM) */ 290 #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) 291 /* Use generic bootcount RAM driver */ 292 #define CONFIG_BOOTCOUNT_RAM 293 294 /* enable POST tests */ 295 #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) 296 #define CONFIG_POST_SKIP_ENV_FLAGS 297 #define CONFIG_POST_EXTERNAL_WORD_FUNCS 298 299 /* we do the whole PCIe FPGA config stuff here */ 300 301 #endif /* _CONFIG_KM_ARM_H */ 302