xref: /openbmc/u-boot/include/configs/km/km_arm.h (revision 9ecb0c41)
1 /*
2  * (C) Copyright 2009
3  * Marvell Semiconductor <www.marvell.com>
4  * Prafulla Wadaskar <prafulla@marvell.com>
5  *
6  * (C) Copyright 2009
7  * Stefan Roese, DENX Software Engineering, sr@denx.de.
8  *
9  * (C) Copyright 2010-2011
10  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
11  *
12  * SPDX-License-Identifier:	GPL-2.0+
13  */
14 
15 /*
16  * for linking errors see
17  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
18  */
19 
20 #ifndef _CONFIG_KM_ARM_H
21 #define _CONFIG_KM_ARM_H
22 
23 
24 /* We got removed from Linux mach-types.h */
25 #define MACH_TYPE_KM_KIRKWOOD          2255
26 
27 /*
28  * High Level Configuration Options (easy to change)
29  */
30 #define CONFIG_MARVELL
31 #define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
32 #define CONFIG_KW88F6281		/* SOC Name */
33 #define CONFIG_MACH_KM_KIRKWOOD		/* Machine type */
34 
35 #define CONFIG_MACH_TYPE	MACH_TYPE_KM_KIRKWOOD
36 
37 #define CONFIG_NAND_ECC_BCH
38 #define CONFIG_BCH
39 
40 /* include common defines/options for all Keymile boards */
41 #include "keymile-common.h"
42 
43 #define CONFIG_CMD_NAND
44 #define CONFIG_CMD_SF
45 
46 /* SPI NOR Flash default params, used by sf commands */
47 #define CONFIG_SF_DEFAULT_SPEED		8100000
48 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_3
49 
50 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
51 #define CONFIG_ENV_SPI_BUS		0
52 #define CONFIG_ENV_SPI_CS		0
53 #define CONFIG_ENV_SPI_MAX_HZ		8100000
54 #define CONFIG_ENV_SPI_MODE		SPI_MODE_3
55 #endif
56 
57 /* Reserve 4 MB for malloc */
58 #define CONFIG_SYS_MALLOC_LEN		(4 * 1024 * 1024)
59 
60 #include "asm/arch/config.h"
61 
62 #define CONFIG_SYS_TEXT_BASE	0x07d00000	/* code address before reloc */
63 #define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
64 #define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
65 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
66 
67 /* pseudo-non volatile RAM [hex] */
68 #define CONFIG_KM_PNVRAM	0x80000
69 /* physical RAM MTD size [hex] */
70 #define CONFIG_KM_PHRAM		0x17F000
71 
72 #define CONFIG_KM_CRAMFS_ADDR	0x2400000
73 #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 3098KBytes */
74 #define CONFIG_KM_FDT_ADDR	0x23E0000	/*  128KBytes */
75 
76 /* architecture specific default bootargs */
77 #define CONFIG_KM_DEF_BOOT_ARGS_CPU					\
78 		"bootcountaddr=${bootcountaddr} ${mtdparts}"		\
79 		" boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}"
80 
81 #define CONFIG_KM_DEF_ENV_CPU						\
82 	"u-boot="__stringify(CONFIG_HOSTNAME) "/u-boot.kwb\0"		\
83 	CONFIG_KM_UPDATE_UBOOT						\
84 	"set_fdthigh=setenv fdt_high ${kernelmem}\0"			\
85 	"checkfdt="							\
86 		"if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; "	\
87 		"then true; else setenv cramfsloadfdt true; "		\
88 		"setenv boot bootm ${load_addr_r}; "			\
89 		"echo No FDT found, booting with the kernel "		\
90 		"appended one; fi\0"					\
91 	""
92 
93 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
94 #define CONFIG_MISC_INIT_R
95 
96 /*
97  * NS16550 Configuration
98  */
99 #define CONFIG_SYS_NS16550_SERIAL
100 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
101 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
102 #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
103 #define CONFIG_SYS_NS16550_COM2		KW_UART1_BASE
104 
105 /*
106  * Serial Port configuration
107  * The following definitions let you select what serial you want to use
108  * for your console driver.
109  */
110 
111 #define CONFIG_CONS_INDEX	1	/* Console on UART0 */
112 
113 /*
114  * For booting Linux, the board info and command line data
115  * have to be in the first 8 MB of memory, since this is
116  * the maximum mapped by the Linux kernel during initialization.
117  */
118 #define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
119 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
120 #define CONFIG_INITRD_TAG		/* enable INITRD tag */
121 #define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */
122 
123 /*
124  * Commands configuration
125  */
126 #define CONFIG_CMD_MTDPARTS
127 
128 /*
129  * Without NOR FLASH we need this
130  */
131 #define CONFIG_SYS_NO_FLASH
132 
133 /*
134  * NAND Flash configuration
135  */
136 #define CONFIG_SYS_MAX_NAND_DEVICE	1
137 
138 #define BOOTFLASH_START		0x0
139 
140 /* Kirkwood has two serial IF */
141 #if (CONFIG_CONS_INDEX == 2)
142 #define CONFIG_KM_CONSOLE_TTY	"ttyS1"
143 #else
144 #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
145 #endif
146 
147 /*
148  * Other required minimal configurations
149  */
150 #define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
151 #define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
152 #define CONFIG_ARCH_MISC_INIT		/* call arch_misc_init() */
153 #define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
154 #define CONFIG_NR_DRAM_BANKS	4
155 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
156 
157 /*
158  * Ethernet Driver configuration
159  */
160 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
161 #define CONFIG_MII		/* expose smi ove miiphy interface */
162 #define CONFIG_CMD_MII		/* to debug mdio phy config */
163 #define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
164 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
165 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
166 #define CONFIG_PHY_BASE_ADR	0
167 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
168 #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */
169 
170 /*
171  * UBI related stuff
172  */
173 #define CONFIG_SYS_USE_UBI
174 
175 /*
176  * I2C related stuff
177  */
178 #undef CONFIG_I2C_MVTWSI
179 #define CONFIG_SYS_I2C
180 #define	CONFIG_SYS_I2C_SOFT	/* I2C bit-banged	*/
181 #define CONFIG_SYS_I2C_INIT_BOARD
182 
183 #define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
184 #define CONFIG_SYS_NUM_I2C_BUSES	6
185 #define CONFIG_SYS_I2C_MAX_HOPS		1
186 #define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
187 					{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
188 					{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
189 					{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
190 					{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
191 					{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
192 				}
193 
194 #ifndef __ASSEMBLY__
195 #include <asm/arch/gpio.h>
196 extern void __set_direction(unsigned pin, int high);
197 void set_sda(int state);
198 void set_scl(int state);
199 int get_sda(void);
200 int get_scl(void);
201 #define KM_KIRKWOOD_SDA_PIN	8
202 #define KM_KIRKWOOD_SCL_PIN	9
203 #define KM_KIRKWOOD_SOFT_I2C_GPIOS	0x0300
204 #define KM_KIRKWOOD_ENV_WP	38
205 
206 #define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
207 #define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
208 #define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
209 #define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
210 #define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
211 #endif
212 
213 #define I2C_DELAY	udelay(1)
214 #define I2C_SOFT_DECLARATIONS
215 
216 #define	CONFIG_SYS_I2C_SOFT_SLAVE	0x0
217 #define	CONFIG_SYS_I2C_SOFT_SPEED	100000
218 
219 /* EEprom support 24C128, 24C256 valid for environment eeprom */
220 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE
221 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	6 /* 64 Byte write page */
222 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10
223 
224 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
225 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
226 
227 /*
228  *  Environment variables configurations
229  */
230 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
231 #define CONFIG_ENV_IS_IN_SPI_FLASH  /* use SPI-Flash for environment vars */
232 #define CONFIG_ENV_OFFSET		0xc0000     /* no bracets! */
233 #define CONFIG_ENV_SIZE			0x02000     /* Size of Environment */
234 #define CONFIG_ENV_SECT_SIZE		0x10000
235 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
236 					CONFIG_ENV_SECT_SIZE)
237 #define CONFIG_ENV_TOTAL_SIZE		0x20000     /* no bracets! */
238 #else
239 #define CONFIG_ENV_IS_IN_EEPROM		/* use EEPROM for environment vars */
240 #define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
241 #define CONFIG_ENV_EEPROM_IS_ON_I2C
242 #define CONFIG_SYS_EEPROM_WREN
243 #define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
244 #define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
245 #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */
246 #define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
247 #define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
248 #endif
249 
250 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
251 
252 
253 /* SPI bus claim MPP configuration */
254 #define CONFIG_SYS_KW_SPI_MPP	0x0
255 
256 #define FLASH_GPIO_PIN			0x00010000
257 #define KM_FLASH_GPIO_PIN	16
258 
259 #ifndef MTDIDS_DEFAULT
260 # define MTDIDS_DEFAULT		"nand0=orion_nand"
261 #endif /* MTDIDS_DEFAULT */
262 
263 #ifndef MTDPARTS_DEFAULT
264 # define MTDPARTS_DEFAULT	"mtdparts="			\
265 	"orion_nand:"						\
266 		"-(" CONFIG_KM_UBI_PARTITION_NAME_BOOT ");"
267 #endif /* MTDPARTS_DEFAULT */
268 
269 #define	CONFIG_KM_UPDATE_UBOOT						\
270 	"update="							\
271 		"sf probe 0;sf erase 0 +${filesize};"			\
272 		"sf write ${load_addr_r} 0 ${filesize};\0"
273 
274 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR
275 #define CONFIG_KM_NEW_ENV						\
276 	"newenv=sf probe 0;"						\
277 		"sf erase " __stringify(CONFIG_ENV_OFFSET) " "		\
278 		__stringify(CONFIG_ENV_TOTAL_SIZE)"\0"
279 #else
280 #define CONFIG_KM_NEW_ENV						\
281 	"newenv=setenv addr 0x100000 && "				\
282 		"i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; "  \
283 		"mw.b ${addr} 0 4 && "					\
284 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
285 		" ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && "	\
286 		"eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR)	\
287 		" ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0"
288 #endif
289 
290 #ifndef CONFIG_KM_BOARD_EXTRA_ENV
291 #define CONFIG_KM_BOARD_EXTRA_ENV       ""
292 #endif
293 
294 /*
295  * Default environment variables
296  */
297 #define CONFIG_EXTRA_ENV_SETTINGS					\
298 	CONFIG_KM_BOARD_EXTRA_ENV					\
299 	CONFIG_KM_DEF_ENV						\
300 	CONFIG_KM_NEW_ENV						\
301 	"arch=arm\0"							\
302 	""
303 
304 #if defined(CONFIG_SYS_NO_FLASH)
305 #undef	CONFIG_FLASH_CFI_MTD
306 #undef	CONFIG_JFFS2_CMDLINE
307 #endif
308 
309 /* additions for new relocation code, must be added to all boards */
310 #define CONFIG_SYS_SDRAM_BASE		0x00000000
311 /* Do early setups now in board_init_f() */
312 #define CONFIG_BOARD_EARLY_INIT_F
313 
314 /*
315  * resereved pram area at the end of memroy [hex]
316  * 8Mbytes for switch + 4Kbytes for bootcount
317  */
318 #define CONFIG_KM_RESERVED_PRAM 0x801000
319 /* address for the bootcount (taken from end of RAM) */
320 #define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
321 /* Use generic bootcount RAM driver */
322 #define CONFIG_BOOTCOUNT_RAM
323 
324 /* enable POST tests */
325 #define CONFIG_POST	(CONFIG_SYS_POST_MEM_REGIONS)
326 #define CONFIG_POST_SKIP_ENV_FLAGS
327 #define CONFIG_POST_EXTERNAL_WORD_FUNCS
328 #define CONFIG_CMD_DIAG
329 
330 /* we do the whole PCIe FPGA config stuff here */
331 #define	CONFIG_BOARD_LATE_INIT
332 
333 #endif /* _CONFIG_KM_ARM_H */
334