xref: /openbmc/u-boot/include/configs/km/km_arm.h (revision 2d9528e32fa0a05d2b170a23fb445f83d4d26571)
1 /*
2  * (C) Copyright 2009
3  * Marvell Semiconductor <www.marvell.com>
4  * Prafulla Wadaskar <prafulla@marvell.com>
5  *
6  * (C) Copyright 2009
7  * Stefan Roese, DENX Software Engineering, sr@denx.de.
8  *
9  * (C) Copyright 2010-2011
10  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
11  *
12  * See file CREDITS for list of people who contributed to this
13  * project.
14  *
15  * This program is free software; you can redistribute it and/or
16  * modify it under the terms of the GNU General Public License as
17  * published by the Free Software Foundation; either version 2 of
18  * the License, or (at your option) any later version.
19  *
20  * This program is distributed in the hope that it will be useful,
21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
23  * GNU General Public License for more details.
24  *
25  * You should have received a copy of the GNU General Public License
26  * along with this program; if not, write to the Free Software
27  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
28  * MA 02110-1301 USA
29  */
30 
31 /*
32  * for linking errors see
33  * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
34  */
35 
36 #ifndef _CONFIG_KM_ARM_H
37 #define _CONFIG_KM_ARM_H
38 
39 /*
40  * High Level Configuration Options (easy to change)
41  */
42 #define CONFIG_MARVELL
43 #define CONFIG_ARM926EJS		/* Basic Architecture */
44 #define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
45 #define CONFIG_KIRKWOOD			/* SOC Family Name */
46 #define CONFIG_KW88F6281		/* SOC Name */
47 #define CONFIG_MACH_KM_KIRKWOOD		/* Machine type */
48 
49 /* include common defines/options for all Keymile boards */
50 #include "keymile-common.h"
51 
52 #define CONFIG_SYS_TEXT_BASE	0x04000000	/* code address after reloc */
53 #define CONFIG_ENV_SIZE		(128 << 10)	/* NAND chip block size	*/
54 #define CONFIG_SYS_MEMTEST_START 0x00400000	/* 4M */
55 #define CONFIG_SYS_MEMTEST_END	0x007fffff	/*(_8M -1) */
56 #define CONFIG_SYS_LOAD_ADDR	0x00800000	/* default load adr- 8M */
57 
58 /* pseudo-non volatile RAM [hex] */
59 #define CONFIG_KM_PNVRAM	0x80000
60 /* physical RAM MTD size [hex] */
61 #define CONFIG_KM_PHRAM		0x17F000
62 
63 #define CONFIG_KM_CRAMFS_ADDR	0x2400000
64 #define CONFIG_KM_KERNEL_ADDR	0x2000000	/* 4096KBytes */
65 
66 #define CONFIG_KM_DEF_ENV_CPU						\
67 	"addmtdparts=setenv bootargs ${bootargs} ${mtdparts}\0"		\
68 	"boot=bootm ${actual_kernel_addr} - -\0"			\
69 	"cramfsloadfdt=true\0"						\
70 	CONFIG_KM_DEF_ENV_UPDATE					\
71 	""
72 
73 #define CONFIG_KM_ARCH_DBG_FILE		"scripts/debug-arm-env.txt"
74 
75 #define CONFIG_MD5	/* get_random_hex on krikwood needs MD5 support */
76 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
77 #define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
78 #undef  CONFIG_KIRKWOOD_PCIE_INIT	/* Disable PCIE Port0 for kernel */
79 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */
80 
81 #define CONFIG_MISC_INIT_R
82 
83 /*
84  * NS16550 Configuration
85  */
86 #define CONFIG_SYS_NS16550
87 #define CONFIG_SYS_NS16550_SERIAL
88 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
89 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
90 #define CONFIG_SYS_NS16550_COM1		KW_UART0_BASE
91 
92 /*
93  * Serial Port configuration
94  * The following definitions let you select what serial you want to use
95  * for your console driver.
96  */
97 
98 #define CONFIG_CONS_INDEX	1	/* Console on UART0 */
99 
100 /*
101  * For booting Linux, the board info and command line data
102  * have to be in the first 8 MB of memory, since this is
103  * the maximum mapped by the Linux kernel during initialization.
104  */
105 #define CONFIG_BOOTMAPSZ	(8 << 20)	/* Initial Memmap for Linux */
106 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
107 #define CONFIG_INITRD_TAG		/* enable INITRD tag */
108 #define CONFIG_SETUP_MEMORY_TAGS	/* enable memory tag */
109 
110 /*
111  * Commands configuration
112  */
113 #define CONFIG_CMD_ELF
114 #define CONFIG_CMD_MTDPARTS
115 #define CONFIG_CMD_NAND
116 #define CONFIG_CMD_NFS
117 
118 /*
119  * Without NOR FLASH we need this
120  */
121 #define CONFIG_SYS_NO_FLASH
122 #undef CONFIG_CMD_FLASH
123 #undef CONFIG_CMD_IMLS
124 
125 /*
126  * NAND Flash configuration
127  */
128 #define CONFIG_SYS_MAX_NAND_DEVICE	1
129 #define NAND_MAX_CHIPS			1
130 #define CONFIG_NAND_KIRKWOOD
131 #define CONFIG_SYS_NAND_BASE		0xd8000000
132 
133 #define BOOTFLASH_START		0x0
134 
135 #define CONFIG_KM_CONSOLE_TTY	"ttyS0"
136 
137 /*
138  * Other required minimal configurations
139  */
140 #define CONFIG_CONSOLE_INFO_QUIET	/* some code reduction */
141 #define CONFIG_ARCH_CPU_INIT		/* call arch_cpu_init() */
142 #define CONFIG_ARCH_MISC_INIT		/* call arch_misc_init() */
143 #define CONFIG_DISPLAY_CPUINFO		/* Display cpu info */
144 #define CONFIG_NR_DRAM_BANKS	4
145 #define CONFIG_STACKSIZE	0x00100000	/* regular stack- 1M */
146 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000	/* Rst Vector Adr */
147 
148 /*
149  * Ethernet Driver configuration
150  */
151 #define CONFIG_NETCONSOLE	/* include NetConsole support   */
152 #define CONFIG_NET_MULTI	/* specify more that one ports available */
153 #define CONFIG_MII		/* expose smi ove miiphy interface */
154 #define CONFIG_MVGBE		/* Enable Marvell Gbe Controller Driver */
155 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN	/* detect link using phy */
156 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable port 0 only */
157 #define CONFIG_PHY_BASE_ADR	0
158 #define CONFIG_ENV_OVERWRITE	/* ethaddr can be reprogrammed */
159 #define CONFIG_RESET_PHY_R	/* use reset_phy() to init 88E1118 PHY */
160 
161 /*
162  * UBI related stuff
163  */
164 #define CONFIG_SYS_USE_UBI
165 
166 /*
167  * I2C related stuff
168  */
169 #define	CONFIG_SOFT_I2C		/* I2C bit-banged	*/
170 
171 #define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
172 #if defined(CONFIG_SOFT_I2C)
173 #ifndef __ASSEMBLY__
174 #include <asm/arch-kirkwood/gpio.h>
175 extern void __set_direction(unsigned pin, int high);
176 void set_sda(int state);
177 void set_scl(int state);
178 int get_sda(void);
179 int get_scl(void);
180 #define KM_KIRKWOOD_SDA_PIN	8
181 #define KM_KIRKWOOD_SCL_PIN	9
182 #define KM_KIRKWOOD_ENV_WP	38
183 
184 #define I2C_ACTIVE	__set_direction(KM_KIRKWOOD_SDA_PIN, 0)
185 #define I2C_TRISTATE	__set_direction(KM_KIRKWOOD_SDA_PIN, 1)
186 #define I2C_READ	(kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0)
187 #define I2C_SDA(bit)	kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit)
188 #define I2C_SCL(bit)	kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit)
189 #endif
190 
191 #define I2C_DELAY	udelay(3)	/* 1/4 I2C clock duration */
192 #define I2C_SOFT_DECLARATIONS
193 
194 #define	CONFIG_SYS_I2C_SLAVE		0x0
195 #define	CONFIG_SYS_I2C_SPEED		100000
196 #endif
197 
198 #define CONFIG_SYS_I2C_EEPROM_ADDR	0x50
199 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
200 
201 /*
202  *  Environment variables configurations
203  */
204 #define CONFIG_ENV_IS_IN_EEPROM		/* use EEPROM for environment vars */
205 #define CONFIG_SYS_DEF_EEPROM_ADDR	0x50
206 #define CONFIG_ENV_EEPROM_IS_ON_I2C
207 #define CONFIG_SYS_EEPROM_WREN
208 #define CONFIG_ENV_OFFSET		0x0 /* no bracets! */
209 #undef	CONFIG_ENV_SIZE
210 #define CONFIG_ENV_SIZE			(0x2000 - CONFIG_ENV_OFFSET)
211 #define CONFIG_I2C_ENV_EEPROM_BUS	"pca9547:70:d\0"
212 
213 /* offset redund: (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
214 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
215 #define CONFIG_ENV_OFFSET_REDUND	0x2000 /* no bracets! */
216 #define CONFIG_ENV_SIZE_REDUND		(CONFIG_ENV_SIZE)
217 
218 #define CONFIG_CMD_SF
219 
220 #define CONFIG_SPI_FLASH
221 #define CONFIG_HARD_SPI
222 #define CONFIG_KIRKWOOD_SPI
223 #define CONFIG_SPI_FLASH_STMICRO
224 #define CONFIG_ENV_SPI_BUS		0
225 #define CONFIG_ENV_SPI_CS		0
226 #define CONFIG_ENV_SPI_MAX_HZ		50000000	/* 50Mhz */
227 
228 #define FLASH_GPIO_PIN			0x00010000
229 
230 #define MTDIDS_DEFAULT		"nand0=orion_nand"
231 /* test-only: partitioning needs some tuning, this is just for tests */
232 #define MTDPARTS_DEFAULT	"mtdparts="				\
233 	"orion_nand:"							\
234 		"-(" CONFIG_KM_UBI_PARTITION_NAME ")"
235 
236 #define	CONFIG_KM_DEF_ENV_UPDATE					\
237 	"update="							\
238 		"spi on;sf probe 0;sf erase 0 50000;"			\
239 		"sf write ${u-boot_addr_r} 0 ${filesize};"		\
240 		"spi off\0"
241 
242 #if defined(CONFIG_SYS_NO_FLASH)
243 #define CONFIG_KM_UBI_PARTITION_NAME   "ubi0"
244 #undef	CONFIG_FLASH_CFI_MTD
245 #undef	CONFIG_JFFS2_CMDLINE
246 #endif
247 
248 /* additions for new relocation code, must be added to all boards */
249 #define CONFIG_SYS_SDRAM_BASE		0x00000000
250 /* Kirkwood has 2k of Security SRAM, use it for SP */
251 #define CONFIG_SYS_INIT_SP_ADDR		0xC8012000
252 /* Do early setups now in board_init_f() */
253 #define CONFIG_BOARD_EARLY_INIT_F
254 
255 /*
256  * resereved pram area at the end of memroy [hex]
257  * 8Mbytes for switch + 4Kbytes for bootcount
258  */
259 #define CONFIG_KM_RESERVED_PRAM 0x801000
260 /* address for the bootcount (taken from end of RAM) */
261 #define BOOTCOUNT_ADDR          (CONFIG_KM_RESERVED_PRAM)
262 
263 #endif /* _CONFIG_KM_ARM_H */
264