1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2009 4 * Marvell Semiconductor <www.marvell.com> 5 * Prafulla Wadaskar <prafulla@marvell.com> 6 * 7 * (C) Copyright 2009 8 * Stefan Roese, DENX Software Engineering, sr@denx.de. 9 * 10 * (C) Copyright 2010-2011 11 * Heiko Schocher, DENX Software Engineering, hs@denx.de. 12 */ 13 14 /* 15 * for linking errors see 16 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html 17 */ 18 19 #ifndef _CONFIG_KM_ARM_H 20 #define _CONFIG_KM_ARM_H 21 22 /* 23 * High Level Configuration Options (easy to change) 24 */ 25 #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ 26 #define CONFIG_KW88F6281 /* SOC Name */ 27 28 #define CONFIG_MACH_TYPE MACH_TYPE_KM_KIRKWOOD 29 30 #define CONFIG_NAND_ECC_BCH 31 32 /* include common defines/options for all Keymile boards */ 33 #include "keymile-common.h" 34 35 /* SPI NOR Flash default params, used by sf commands */ 36 37 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 38 #define CONFIG_ENV_SPI_BUS 0 39 #define CONFIG_ENV_SPI_CS 0 40 #define CONFIG_ENV_SPI_MAX_HZ 8100000 41 #define CONFIG_ENV_SPI_MODE SPI_MODE_3 42 #endif 43 44 /* Reserve 4 MB for malloc */ 45 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) 46 47 #include "asm/arch/config.h" 48 49 #define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ 50 #define CONFIG_SYS_MEMTEST_END 0x007fffff /*(_8M -1) */ 51 #define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */ 52 53 /* pseudo-non volatile RAM [hex] */ 54 #define CONFIG_KM_PNVRAM 0x80000 55 /* physical RAM MTD size [hex] */ 56 #define CONFIG_KM_PHRAM 0x17F000 57 58 #define CONFIG_KM_CRAMFS_ADDR 0x2400000 59 #define CONFIG_KM_KERNEL_ADDR 0x2000000 /* 3098KBytes */ 60 #define CONFIG_KM_FDT_ADDR 0x23E0000 /* 128KBytes */ 61 62 /* architecture specific default bootargs */ 63 #define CONFIG_KM_DEF_BOOT_ARGS_CPU \ 64 "bootcountaddr=${bootcountaddr} ${mtdparts}" \ 65 " boardid=0x${IVM_BoardId} hwkey=0x${IVM_HWKey}" 66 67 #define CONFIG_KM_DEF_ENV_CPU \ 68 "u-boot="CONFIG_HOSTNAME "/u-boot.kwb\0" \ 69 CONFIG_KM_UPDATE_UBOOT \ 70 "set_fdthigh=setenv fdt_high ${kernelmem}\0" \ 71 "checkfdt=" \ 72 "if cramfsls fdt_0x${IVM_BoardId}_0x${IVM_HWKey}.dtb; " \ 73 "then true; else setenv cramfsloadfdt true; " \ 74 "setenv boot bootm ${load_addr_r}; " \ 75 "echo No FDT found, booting with the kernel " \ 76 "appended one; fi\0" \ 77 "" 78 79 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 80 81 /* 82 * NS16550 Configuration 83 */ 84 #define CONFIG_SYS_NS16550_SERIAL 85 #define CONFIG_SYS_NS16550_REG_SIZE (-4) 86 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK 87 #define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE 88 #define CONFIG_SYS_NS16550_COM2 KW_UART1_BASE 89 90 /* 91 * Serial Port configuration 92 * The following definitions let you select what serial you want to use 93 * for your console driver. 94 */ 95 96 /* 97 * For booting Linux, the board info and command line data 98 * have to be in the first 8 MB of memory, since this is 99 * the maximum mapped by the Linux kernel during initialization. 100 */ 101 #define CONFIG_BOOTMAPSZ (8 << 20) /* Initial Memmap for Linux */ 102 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 103 #define CONFIG_INITRD_TAG /* enable INITRD tag */ 104 #define CONFIG_SETUP_MEMORY_TAGS /* enable memory tag */ 105 106 /* 107 * NAND Flash configuration 108 */ 109 #define CONFIG_SYS_MAX_NAND_DEVICE 1 110 111 #define BOOTFLASH_START 0x0 112 113 /* Kirkwood has two serial IF */ 114 #if (CONFIG_CONS_INDEX == 2) 115 #define CONFIG_KM_CONSOLE_TTY "ttyS1" 116 #else 117 #define CONFIG_KM_CONSOLE_TTY "ttyS0" 118 #endif 119 120 /* 121 * Other required minimal configurations 122 */ 123 #define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ 124 #define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ 125 126 /* 127 * Ethernet Driver configuration 128 */ 129 #define CONFIG_NETCONSOLE /* include NetConsole support */ 130 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */ 131 #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */ 132 #define CONFIG_PHY_BASE_ADR 0 133 #define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */ 134 #define CONFIG_KM_COMMON_ETH_INIT /* standard km ethernet_present for piggy */ 135 136 /* 137 * I2C related stuff 138 */ 139 #undef CONFIG_I2C_MVTWSI 140 #define CONFIG_SYS_I2C 141 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */ 142 #define CONFIG_SYS_I2C_INIT_BOARD 143 144 #define CONFIG_KIRKWOOD_GPIO /* Enable GPIO Support */ 145 #define CONFIG_SYS_NUM_I2C_BUSES 6 146 #define CONFIG_SYS_I2C_MAX_HOPS 1 147 #define CONFIG_SYS_I2C_BUSES { {0, {I2C_NULL_HOP} }, \ 148 {0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \ 149 {0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \ 150 {0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \ 151 {0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \ 152 {0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \ 153 } 154 155 #ifndef __ASSEMBLY__ 156 #include <asm/arch/gpio.h> 157 extern void __set_direction(unsigned pin, int high); 158 void set_sda(int state); 159 void set_scl(int state); 160 int get_sda(void); 161 int get_scl(void); 162 #define KM_KIRKWOOD_SDA_PIN 8 163 #define KM_KIRKWOOD_SCL_PIN 9 164 #define KM_KIRKWOOD_SOFT_I2C_GPIOS 0x0300 165 #define KM_KIRKWOOD_ENV_WP 38 166 167 #define I2C_ACTIVE __set_direction(KM_KIRKWOOD_SDA_PIN, 0) 168 #define I2C_TRISTATE __set_direction(KM_KIRKWOOD_SDA_PIN, 1) 169 #define I2C_READ (kw_gpio_get_value(KM_KIRKWOOD_SDA_PIN) ? 1 : 0) 170 #define I2C_SDA(bit) kw_gpio_set_value(KM_KIRKWOOD_SDA_PIN, bit) 171 #define I2C_SCL(bit) kw_gpio_set_value(KM_KIRKWOOD_SCL_PIN, bit) 172 #endif 173 174 #define I2C_DELAY udelay(1) 175 #define I2C_SOFT_DECLARATIONS 176 177 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x0 178 #define CONFIG_SYS_I2C_SOFT_SPEED 100000 179 180 /* EEprom support 24C128, 24C256 valid for environment eeprom */ 181 #define CONFIG_SYS_EEPROM_PAGE_WRITE_ENABLE 182 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 Byte write page */ 183 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 184 185 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 186 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 187 188 /* 189 * Environment variables configurations 190 */ 191 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 192 #define CONFIG_ENV_OFFSET 0xc0000 /* no bracets! */ 193 #define CONFIG_ENV_SIZE 0x02000 /* Size of Environment */ 194 #define CONFIG_ENV_SECT_SIZE 0x10000 195 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \ 196 CONFIG_ENV_SECT_SIZE) 197 #define CONFIG_ENV_TOTAL_SIZE 0x20000 /* no bracets! */ 198 #else 199 #define CONFIG_SYS_DEF_EEPROM_ADDR 0x50 200 #define CONFIG_ENV_EEPROM_IS_ON_I2C 201 #define CONFIG_SYS_EEPROM_WREN 202 #define CONFIG_ENV_OFFSET 0x0 /* no bracets! */ 203 #define CONFIG_ENV_SIZE (0x2000 - CONFIG_ENV_OFFSET) 204 #define CONFIG_I2C_ENV_EEPROM_BUS 5 /* I2C2 (Mux-Port 5) */ 205 #define CONFIG_ENV_OFFSET_REDUND 0x2000 /* no bracets! */ 206 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) 207 #endif 208 209 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 210 211 212 /* SPI bus claim MPP configuration */ 213 #define CONFIG_SYS_KW_SPI_MPP 0x0 214 215 #define FLASH_GPIO_PIN 0x00010000 216 #define KM_FLASH_GPIO_PIN 16 217 218 #define CONFIG_KM_UPDATE_UBOOT \ 219 "update=" \ 220 "sf probe 0;sf erase 0 +${filesize};" \ 221 "sf write ${load_addr_r} 0 ${filesize};\0" 222 223 #if defined CONFIG_KM_ENV_IS_IN_SPI_NOR 224 #define CONFIG_KM_NEW_ENV \ 225 "newenv=sf probe 0;" \ 226 "sf erase " __stringify(CONFIG_ENV_OFFSET) " " \ 227 __stringify(CONFIG_ENV_TOTAL_SIZE)"\0" 228 #else 229 #define CONFIG_KM_NEW_ENV \ 230 "newenv=setenv addr 0x100000 && " \ 231 "i2c dev " __stringify(CONFIG_I2C_ENV_EEPROM_BUS) "; " \ 232 "mw.b ${addr} 0 4 && " \ 233 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 234 " ${addr} " __stringify(CONFIG_ENV_OFFSET) " 4 && " \ 235 "eeprom write " __stringify(CONFIG_SYS_DEF_EEPROM_ADDR) \ 236 " ${addr} " __stringify(CONFIG_ENV_OFFSET_REDUND) " 4\0" 237 #endif 238 239 #ifndef CONFIG_KM_BOARD_EXTRA_ENV 240 #define CONFIG_KM_BOARD_EXTRA_ENV "" 241 #endif 242 243 /* 244 * Default environment variables 245 */ 246 #define CONFIG_EXTRA_ENV_SETTINGS \ 247 CONFIG_KM_BOARD_EXTRA_ENV \ 248 CONFIG_KM_DEF_ENV \ 249 CONFIG_KM_NEW_ENV \ 250 "arch=arm\0" \ 251 "" 252 253 #if !defined(CONFIG_MTD_NOR_FLASH) 254 #undef CONFIG_JFFS2_CMDLINE 255 #endif 256 257 /* additions for new relocation code, must be added to all boards */ 258 #define CONFIG_SYS_SDRAM_BASE 0x00000000 259 /* Do early setups now in board_init_f() */ 260 261 /* 262 * resereved pram area at the end of memroy [hex] 263 * 8Mbytes for switch + 4Kbytes for bootcount 264 */ 265 #define CONFIG_KM_RESERVED_PRAM 0x801000 266 /* address for the bootcount (taken from end of RAM) */ 267 #define BOOTCOUNT_ADDR (CONFIG_KM_RESERVED_PRAM) 268 269 /* enable POST tests */ 270 #define CONFIG_POST (CONFIG_SYS_POST_MEM_REGIONS) 271 #define CONFIG_POST_SKIP_ENV_FLAGS 272 #define CONFIG_POST_EXTERNAL_WORD_FUNCS 273 274 /* we do the whole PCIe FPGA config stuff here */ 275 276 #endif /* _CONFIG_KM_ARM_H */ 277