xref: /openbmc/u-boot/include/configs/k2hk_evm.h (revision c2800b16)
1 /*
2  * Configuration header file for TI's k2hk-evm
3  *
4  * (C) Copyright 2012-2014
5  *     Texas Instruments Incorporated, <www.ti.com>
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_K2HK_EVM_H
11 #define __CONFIG_K2HK_EVM_H
12 
13 /* Platform type */
14 #define CONFIG_SOC_K2HK
15 #define CONFIG_K2HK_EVM
16 
17 /* U-Boot Build Configuration */
18 #define CONFIG_SKIP_LOWLEVEL_INIT       /* U-Boot is a 2nd stage loader */
19 #define CONFIG_SYS_NO_FLASH             /* that is, no *NOR* flash */
20 #define CONFIG_SYS_CONSOLE_INFO_QUIET
21 #define CONFIG_BOARD_EARLY_INIT_F
22 #define CONFIG_SYS_THUMB_BUILD
23 
24 /* SoC Configuration */
25 #define CONFIG_ARMV7
26 #define CONFIG_ARCH_CPU_INIT
27 #define CONFIG_SYS_ARCH_TIMER
28 #define CONFIG_SYS_HZ                   1000
29 #define CONFIG_SYS_TEXT_BASE            0x0c001000
30 #define CONFIG_SPL_TARGET               "u-boot-spi.gph"
31 #define CONFIG_SYS_DCACHE_OFF
32 
33 /* Memory Configuration */
34 #define CONFIG_NR_DRAM_BANKS            2
35 #define CONFIG_SYS_SDRAM_BASE           0x80000000
36 #define CONFIG_SYS_LPAE_SDRAM_BASE      0x800000000
37 #define CONFIG_MAX_RAM_BANK_SIZE        (2 << 30)       /* 2GB */
38 #define CONFIG_STACKSIZE                (512 << 10)     /* 512 KiB */
39 #define CONFIG_SYS_MALLOC_LEN           (4 << 20)       /* 4 MiB */
40 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE - \
41 					 GENERATED_GBL_DATA_SIZE)
42 
43 /* SPL SPI Loader Configuration */
44 #define CONFIG_SPL_TEXT_BASE            0x0c200000
45 #define CONFIG_SPL_PAD_TO               65536
46 #define CONFIG_SPL_MAX_SIZE             (CONFIG_SPL_PAD_TO - 8)
47 #define CONFIG_SPL_BSS_START_ADDR       (CONFIG_SPL_TEXT_BASE + \
48 					 CONFIG_SPL_MAX_SIZE)
49 #define CONFIG_SPL_BSS_MAX_SIZE         (32 * 1024)
50 #define CONFIG_SYS_SPL_MALLOC_START     (CONFIG_SPL_BSS_START_ADDR + \
51 					 CONFIG_SPL_BSS_MAX_SIZE)
52 #define CONFIG_SYS_SPL_MALLOC_SIZE      (32 * 1024)
53 #define CONFIG_SPL_STACK_SIZE           (8 * 1024)
54 #define CONFIG_SPL_STACK                (CONFIG_SYS_SPL_MALLOC_START + \
55 					 CONFIG_SYS_SPL_MALLOC_SIZE + \
56 					 CONFIG_SPL_STACK_SIZE - 4)
57 #define CONFIG_SPL_LIBCOMMON_SUPPORT
58 #define CONFIG_SPL_LIBGENERIC_SUPPORT
59 #define CONFIG_SPL_SERIAL_SUPPORT
60 #define CONFIG_SPL_SPI_FLASH_SUPPORT
61 #define CONFIG_SPL_SPI_SUPPORT
62 #define CONFIG_SPL_BOARD_INIT
63 #define CONFIG_SPL_SPI_LOAD
64 #define CONFIG_SPL_SPI_BUS              0
65 #define CONFIG_SPL_SPI_CS               0
66 #define CONFIG_SYS_SPI_U_BOOT_OFFS      CONFIG_SPL_PAD_TO
67 #define CONFIG_SPL_FRAMEWORK
68 
69 /* UART Configuration */
70 #define CONFIG_SYS_NS16550
71 #define CONFIG_SYS_NS16550_SERIAL
72 #define CONFIG_SYS_NS16550_MEM32
73 #define CONFIG_SYS_NS16550_REG_SIZE     -4
74 #define CONFIG_SYS_NS16550_COM1         K2HK_UART0_BASE
75 #define CONFIG_SYS_NS16550_CLK          clk_get_rate(K2HK_CLK1_6)
76 #define CONFIG_CONS_INDEX               1
77 #define CONFIG_BAUDRATE                 115200
78 
79 /* SPI Configuration */
80 #define CONFIG_SPI
81 #define CONFIG_SPI_FLASH
82 #define CONFIG_SPI_FLASH_STMICRO
83 #define CONFIG_DAVINCI_SPI
84 #define CONFIG_SYS_SPI0
85 #define CONFIG_SYS_SPI_BASE             K2HK_SPI_BASE
86 #define CONFIG_SYS_SPI0_NUM_CS          4
87 #define CONFIG_SYS_SPI1
88 #define CONFIG_SYS_SPI1_BASE            K2HK_SPI1_BASE
89 #define CONFIG_SYS_SPI1_NUM_CS          4
90 #define CONFIG_SYS_SPI2
91 #define CONFIG_SYS_SPI2_NUM_CS          4
92 #define CONFIG_SYS_SPI2_BASE            K2HK_SPI2_BASE
93 #define CONFIG_CMD_SPI
94 #define CONFIG_SYS_SPI_CLK              clk_get_rate(K2HK_LPSC_EMIF25_SPI)
95 #define CONFIG_SF_DEFAULT_SPEED         30000000
96 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
97 
98 /* I2C Configuration */
99 #define CONFIG_SYS_I2C
100 #define CONFIG_SYS_I2C_DAVINCI
101 #define CONFIG_SYS_DAVINCI_I2C_SPEED    100000
102 #define CONFIG_SYS_DAVINCI_I2C_SLAVE    0x10 /* SMBus host address */
103 #define CONFIG_SYS_DAVINCI_I2C_SPEED1   100000
104 #define CONFIG_SYS_DAVINCI_I2C_SLAVE1   0x10 /* SMBus host address */
105 #define CONFIG_SYS_DAVINCI_I2C_SPEED2   100000
106 #define CONFIG_SYS_DAVINCI_I2C_SLAVE2   0x10 /* SMBus host address */
107 #define I2C_BUS_MAX                     3
108 
109 /* EEPROM definitions */
110 #define CONFIG_SYS_I2C_MULTI_EEPROMS
111 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         2
112 #define CONFIG_SYS_I2C_EEPROM_ADDR             0x50
113 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      6
114 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  20
115 #define CONFIG_ENV_EEPROM_IS_ON_I2C
116 
117 /* Network Configuration */
118 #define CONFIG_DRIVER_TI_KEYSTONE_NET
119 #define CONFIG_MII
120 #define CONFIG_BOOTP_DEFAULT
121 #define CONFIG_BOOTP_DNS
122 #define CONFIG_BOOTP_DNS2
123 #define CONFIG_BOOTP_SEND_HOSTNAME
124 #define CONFIG_NET_RETRY_COUNT                 32
125 #define CONFIG_NET_MULTI
126 #define CONFIG_GET_LINK_STATUS_ATTEMPTS        5
127 #define CONFIG_SYS_SGMII_REFCLK_MHZ            312
128 #define CONFIG_SYS_SGMII_LINERATE_MHZ          1250
129 #define CONFIG_SYS_SGMII_RATESCALE             2
130 
131 /* NAND Configuration */
132 #define CONFIG_NAND_DAVINCI
133 #define CONFIG_SYS_NAND_CS                     2
134 #define CONFIG_SYS_NAND_USE_FLASH_BBT
135 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
136 #define CONFIG_SYS_NAND_PAGE_2K
137 
138 #define CONFIG_SYS_NAND_LARGEPAGE
139 #define CONFIG_SYS_NAND_BASE_LIST       { 0x30000000, }
140 #define CONFIG_SYS_MAX_NAND_DEVICE      1
141 #define CONFIG_SYS_NAND_MAX_CHIPS       1
142 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
143 #define CONFIG_ENV_SIZE                 (256 << 10)  /* 256 KiB */
144 #define CONFIG_ENV_IS_IN_NAND
145 #define CONFIG_ENV_OFFSET               0x100000
146 #define CONFIG_MTD_PARTITIONS
147 #define CONFIG_MTD_DEVICE
148 #define CONFIG_RBTREE
149 #define CONFIG_LZO
150 #define MTDPARTS_DEFAULT                "mtdparts=davinci_nand.0:" \
151 					"1024k(bootloader)ro,512k(params)ro," \
152 					"-(ubifs)"
153 /* U-Boot command configuration */
154 #include <config_cmd_default.h>
155 #define CONFIG_CMD_ASKENV
156 #define CONFIG_CMD_DHCP
157 #define CONFIG_CMD_I2C
158 #define CONFIG_CMD_PING
159 #define CONFIG_CMD_SAVES
160 #define CONFIG_CMD_MTDPARTS
161 #define CONFIG_CMD_NAND
162 #define CONFIG_CMD_UBI
163 #define CONFIG_CMD_UBIFS
164 #define CONFIG_CMD_SF
165 #define CONFIG_CMD_EEPROM
166 
167 /* U-Boot general configuration */
168 #define CONFIG_SYS_PROMPT               "K2HK EVM # "
169 #define CONFIG_SYS_CBSIZE               1024
170 #define CONFIG_SYS_PBSIZE		2048
171 #define CONFIG_SYS_MAXARGS              16
172 #define CONFIG_SYS_HUSH_PARSER
173 #define CONFIG_SYS_LONGHELP
174 #define CONFIG_CRC32_VERIFY
175 #define CONFIG_MX_CYCLIC
176 #define CONFIG_CMDLINE_EDITING
177 #define CONFIG_VERSION_VARIABLE
178 #define CONFIG_TIMESTAMP
179 
180 #define CONFIG_BOOTDELAY                3
181 #define CONFIG_BOOTFILE                 "uImage"
182 #define CONFIG_EXTRA_ENV_SETTINGS					\
183 	"boot=ramfs\0"							\
184 	"tftp_root=/\0"							\
185 	"nfs_root=/export\0"						\
186 	"mem_lpae=1\0"							\
187 	"mem_reserve=512M\0"						\
188 	"addr_fdt=0x87000000\0"						\
189 	"addr_kern=0x88000000\0"					\
190 	"addr_mon=0x0c5f0000\0"						\
191 	"addr_uboot=0x87000000\0"					\
192 	"addr_fs=0x82000000\0"						\
193 	"addr_ubi=0x82000000\0"						\
194 	"fdt_high=0xffffffff\0"						\
195 	"name_fdt=uImage-k2hk-evm.dtb\0"				\
196 	"name_fs=arago-console-image.cpio.gz\0"				\
197 	"name_kern=uImage-keystone-evm.bin\0"				\
198 	"name_mon=skern-keystone-evm.bin\0"				\
199 	"name_uboot=u-boot-spi-keystone-evm.gph\0"			\
200 	"name_ubi=keystone-evm-ubifs.ubi\0"				\
201 	"run_mon=mon_install ${addr_mon}\0"				\
202 	"run_kern=bootm ${addr_kern} - ${addr_fdt}\0"			\
203 	"init_net=run args_all args_net\0"				\
204 	"init_ubi=run args_all args_ubi; "				\
205 		"ubi part ubifs; ubifsmount boot\0"			\
206 	"get_fdt_net=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0"	\
207 	"get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0"		\
208 	"get_kern_net=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0"	\
209 	"get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0"		\
210 	"get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
211 	"get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0"		\
212 	"get_uboot_net=dhcp ${addr_uboot} ${tftp_root}/${name_uboot}\0"	\
213 	"burn_uboot=sf probe; sf erase 0 0x100000; "			\
214 		"sf write ${addr_uboot} 0 ${filesize}\0"		\
215 	"args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0"	\
216 	"args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs "	\
217 		"root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,2048\0"	\
218 	"args_net=setenv bootargs ${bootargs} rootfstype=nfs "		\
219 		"root=/dev/nfs rw nfsroot=${serverip}:${nfs_root},"	\
220 		"${nfs_options} ip=dhcp\0"				\
221 	"nfs_options=v3,tcp,rsize=4096,wsize=4096\0"			\
222 	"get_fdt_ramfs=dhcp ${addr_fdt} ${tftp_root}/${name_fdt}\0"	\
223 	"get_kern_ramfs=dhcp ${addr_kern} ${tftp_root}/${name_kern}\0"	\
224 	"get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0"	\
225 	"get_fs_ramfs=dhcp ${addr_fs} ${tftp_root}/${name_fs}\0"	\
226 	"get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0"	\
227 	"burn_ubi=nand erase.part ubifs; "				\
228 		"nand write ${addr_ubi} ubifs ${filesize}\0"		\
229 	"init_ramfs=run args_all args_ramfs get_fs_ramfs\0"		\
230 	"args_ramfs=setenv bootargs ${bootargs} earlyprintk "		\
231 		"rdinit=/sbin/init rw root=/dev/ram0 "			\
232 		"initrd=0x802000000,9M\0"				\
233 	"no_post=1\0"							\
234 	"mtdparts=mtdparts=davinci_nand.0:"				\
235 		"1024k(bootloader)ro,512k(params)ro,522752k(ubifs)\0"
236 #define CONFIG_BOOTCOMMAND						\
237 	"run init_${boot} get_fdt_${boot} get_mon_${boot} "		\
238 		"get_kern_${boot} run_mon run_kern"
239 #define CONFIG_BOOTARGS							\
240 
241 /* Linux interfacing */
242 #define CONFIG_CMDLINE_TAG
243 #define CONFIG_SETUP_MEMORY_TAGS
244 #define CONFIG_OF_LIBFDT                1
245 #define CONFIG_OF_BOARD_SETUP
246 #define CONFIG_SYS_BARGSIZE             1024
247 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x08000000)
248 
249 #define CONFIG_SUPPORT_RAW_INITRD
250 
251 /* we may include files below only after all above definitions */
252 #include <asm/arch/hardware.h>
253 #include <asm/arch/clock.h>
254 #define CONFIG_SYS_HZ_CLOCK             clk_get_rate(K2HK_CLK1_6)
255 
256 #endif /* __CONFIG_K2HK_EVM_H */
257