1*fabbeb33SChia-Wei, Wang /* SPDX-License-Identifier: GPL-2.0+ */ 2*fabbeb33SChia-Wei, Wang /* 3*fabbeb33SChia-Wei, Wang * Copyright (C) ASPEED Technology Inc. 4*fabbeb33SChia-Wei, Wang * 5*fabbeb33SChia-Wei, Wang */ 6*fabbeb33SChia-Wei, Wang 7*fabbeb33SChia-Wei, Wang #ifndef __CONFIG_H 8*fabbeb33SChia-Wei, Wang #define __CONFIG_H 9*fabbeb33SChia-Wei, Wang 10*fabbeb33SChia-Wei, Wang #include <configs/aspeed-common.h> 11*fabbeb33SChia-Wei, Wang 12*fabbeb33SChia-Wei, Wang #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0x300000) 13*fabbeb33SChia-Wei, Wang #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x5000000) 14*fabbeb33SChia-Wei, Wang 15*fabbeb33SChia-Wei, Wang #define CONFIG_SYS_UBOOT_BASE CONFIG_SYS_TEXT_BASE 16*fabbeb33SChia-Wei, Wang 17*fabbeb33SChia-Wei, Wang /* Memory Info */ 18*fabbeb33SChia-Wei, Wang #define CONFIG_SYS_LOAD_ADDR 0x83000000 19*fabbeb33SChia-Wei, Wang 20*fabbeb33SChia-Wei, Wang #ifdef CONFIG_SPL_TINY 21*fabbeb33SChia-Wei, Wang #ifdef CONFIG_SPL_BUILD 22*fabbeb33SChia-Wei, Wang #define CONFIG_SYS_NS16550_REG_SIZE 2 23*fabbeb33SChia-Wei, Wang #endif 24*fabbeb33SChia-Wei, Wang #endif 25*fabbeb33SChia-Wei, Wang 26*fabbeb33SChia-Wei, Wang /* SPL */ 27*fabbeb33SChia-Wei, Wang #define CONFIG_SPL_TEXT_BASE 0x00000000 28*fabbeb33SChia-Wei, Wang #define CONFIG_SPL_MAX_SIZE 0x00010000 29*fabbeb33SChia-Wei, Wang #define CONFIG_SPL_STACK 0x10016000 30*fabbeb33SChia-Wei, Wang #define CONFIG_SPL_BSS_START_ADDR 0x90000000 31*fabbeb33SChia-Wei, Wang #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 32*fabbeb33SChia-Wei, Wang 33*fabbeb33SChia-Wei, Wang #define CONFIG_SUPPORT_EMMC_BOOT 34*fabbeb33SChia-Wei, Wang 35*fabbeb33SChia-Wei, Wang #endif /* __CONFIG_H */ 36