1 /*
2  * (C) Copyright 2012
3  * Linaro
4  * Linus Walleij <linus.walleij@linaro.org>
5  * Common ARM Integrator configuration settings
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #define CONFIG_SYS_MEMTEST_START	0x100000
11 #define CONFIG_SYS_MEMTEST_END		0x10000000
12 #define CONFIG_SYS_TIMERBASE		0x13000100	/* Timer1 */
13 #define CONFIG_SYS_LOAD_ADDR		0x7fc0	/* default load address */
14 #define CONFIG_SYS_LONGHELP
15 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
16 
17 #define CONFIG_CONS_INDEX		0
18 
19 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
20 #define CONFIG_SETUP_MEMORY_TAGS
21 #define CONFIG_MISC_INIT_R		/* call misc_init_r during start up */
22 
23 /*
24  * There are various dependencies on the core module (CM) fitted
25  * Users should refer to their CM user guide
26  */
27 #include "armcoremodule.h"
28 
29 /*
30  * Initialize and remap the core module, use SPD to detect memory size
31  * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
32  * the core module has a CM_INIT register
33  * then the U-Boot initialisation code will
34  * e.g. ARM Boot Monitor or pre-loader is repeated once
35  * (to re-initialise any existing CM_INIT settings to safe values).
36  *
37  * This is usually not the desired behaviour since the platform
38  * will either reboot into the ARM monitor (or pre-loader)
39  * or continuously cycle thru it without U-Boot running,
40  * depending upon the setting of Integrator/CP switch S2-4.
41  *
42  * However it may be needed if Integrator/CP switch S2-1
43  * is set OFF to boot direct into U-Boot.
44  * In that case comment out the line below.
45  */
46 #define CONFIG_CM_INIT
47 #define CONFIG_CM_REMAP
48 #define CONFIG_CM_SPD_DETECT
49 
50 /*
51  * The ARM boot monitor initializes the board.
52  * However, the default U-Boot code also performs the initialization.
53  * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
54  * - see documentation supplied with board for details of how to choose the
55  * image to run at reset/power up
56  * e.g. whether the ARM Boot Monitor runs before U-Boot
57  */
58 /* #define CONFIG_SKIP_LOWLEVEL_INIT */
59 
60 /*
61  * The ARM boot monitor does not relocate U-Boot.
62  * However, the default U-Boot code performs the relocation check,
63  * and may relocate the code if the memory map is changed.
64  * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
65  */
66 /* #define SKIP_CONFIG_RELOCATE_UBOOT */
67 
68 /*
69  * Physical Memory Map
70  */
71 #define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
72 #define PHYS_SDRAM_1		0x00000000	/* SDRAM Bank #1 */
73 #define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB */
74 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
75 #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
76 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
77 				    CONFIG_SYS_INIT_RAM_SIZE - \
78 				    GENERATED_GBL_DATA_SIZE)
79 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
80 
81 /*
82  * FLASH and environment organization
83  * Top varies according to amount fitted
84  * Reserve top 4 blocks of flash
85  * - ARM Boot Monitor
86  * - Unused
87  * - SIB block
88  * - U-Boot environment
89  */
90 #define CONFIG_SYS_FLASH_CFI		1
91 #define CONFIG_FLASH_CFI_DRIVER		1
92 #define CONFIG_SYS_FLASH_BASE		0x24000000
93 #define CONFIG_SYS_MAX_FLASH_BANKS	1
94 
95 /* Timeout values in ticks */
96 #define CONFIG_SYS_FLASH_ERASE_TOUT	(2 * CONFIG_SYS_HZ) /* Erase Timeout */
97 #define CONFIG_SYS_FLASH_WRITE_TOUT	(2 * CONFIG_SYS_HZ) /* Write Timeout */
98 #define CONFIG_SYS_FLASH_PROTECTION	/* The devices have real protection */
99 #define CONFIG_SYS_FLASH_EMPTY_INFO	/* flinfo indicates empty blocks */
100