1 /*
2  * (C) Copyright 2012
3  * Linaro
4  * Linus Walleij <linus.walleij@linaro.org>
5  * Common ARM Integrator configuration settings
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #define CONFIG_INTEGRATOR
11 
12 #define CONFIG_SYS_TEXT_BASE		0x01000000
13 #define CONFIG_SYS_MEMTEST_START	0x100000
14 #define CONFIG_SYS_MEMTEST_END		0x10000000
15 #define CONFIG_SYS_HZ			1000
16 #define CONFIG_SYS_TIMERBASE		0x13000100	/* Timer1 */
17 #define CONFIG_SYS_LOAD_ADDR		0x7fc0	/* default load address */
18 #define CONFIG_SYS_LONGHELP
19 #define CONFIG_SYS_HUSH_PARSER
20 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size*/
21 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
22 #define CONFIG_SYS_MAXARGS		16	/* max number of command args */
23 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/
24 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024) /* Size of malloc() pool */
25 
26 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs  */
27 #define CONFIG_SETUP_MEMORY_TAGS
28 #define CONFIG_OF_LIBFDT		/* enable passing a Device Tree */
29 #define CONFIG_MISC_INIT_R		/* call misc_init_r during start up */
30 
31 /*
32  * There are various dependencies on the core module (CM) fitted
33  * Users should refer to their CM user guide
34  */
35 #include "armcoremodule.h"
36 
37 /*
38  * Initialize and remap the core module, use SPD to detect memory size
39  * If CONFIG_SKIP_LOWLEVEL_INIT is not defined &
40  * the core module has a CM_INIT register
41  * then the U-Boot initialisation code will
42  * e.g. ARM Boot Monitor or pre-loader is repeated once
43  * (to re-initialise any existing CM_INIT settings to safe values).
44  *
45  * This is usually not the desired behaviour since the platform
46  * will either reboot into the ARM monitor (or pre-loader)
47  * or continuously cycle thru it without U-Boot running,
48  * depending upon the setting of Integrator/CP switch S2-4.
49  *
50  * However it may be needed if Integrator/CP switch S2-1
51  * is set OFF to boot direct into U-Boot.
52  * In that case comment out the line below.
53  */
54 #define CONFIG_CM_INIT
55 #define CONFIG_CM_REMAP
56 #define CONFIG_CM_SPD_DETECT
57 
58 /*
59  * The ARM boot monitor initializes the board.
60  * However, the default U-Boot code also performs the initialization.
61  * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT
62  * - see documentation supplied with board for details of how to choose the
63  * image to run at reset/power up
64  * e.g. whether the ARM Boot Monitor runs before U-Boot
65  */
66 /* #define CONFIG_SKIP_LOWLEVEL_INIT */
67 
68 /*
69  * The ARM boot monitor does not relocate U-Boot.
70  * However, the default U-Boot code performs the relocation check,
71  * and may relocate the code if the memory map is changed.
72  * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT
73  */
74 /* #define SKIP_CONFIG_RELOCATE_UBOOT */
75 
76 
77 /*
78  * Physical Memory Map
79  */
80 #define CONFIG_NR_DRAM_BANKS	1		/* we have 1 bank of DRAM */
81 #define PHYS_SDRAM_1		0x00000000	/* SDRAM Bank #1 */
82 #define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB */
83 #define CONFIG_SYS_SDRAM_BASE	PHYS_SDRAM_1
84 #define CONFIG_SYS_INIT_RAM_SIZE PHYS_SDRAM_1_SIZE
85 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_BASE + \
86 				    CONFIG_SYS_INIT_RAM_SIZE - \
87 				    GENERATED_GBL_DATA_SIZE)
88 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_GBL_DATA_OFFSET
89