1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2018 NXP
4  */
5 
6 #ifndef __IMX8QXP_MEK_H
7 #define __IMX8QXP_MEK_H
8 
9 #include <linux/sizes.h>
10 #include <asm/arch/imx-regs.h>
11 
12 #define CONFIG_REMAKE_ELF
13 
14 #define CONFIG_BOARD_EARLY_INIT_F
15 
16 /* Flat Device Tree Definitions */
17 #define CONFIG_OF_BOARD_SETUP
18 
19 #undef CONFIG_CMD_EXPORTENV
20 #undef CONFIG_CMD_IMPORTENV
21 #undef CONFIG_CMD_IMLS
22 
23 #undef CONFIG_CMD_CRC32
24 #undef CONFIG_BOOTM_NETBSD
25 
26 #define CONFIG_FSL_ESDHC
27 #define CONFIG_FSL_USDHC
28 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
29 #define USDHC1_BASE_ADDR                0x5B010000
30 #define USDHC2_BASE_ADDR                0x5B020000
31 #define CONFIG_SUPPORT_EMMC_BOOT	/* eMMC specific */
32 
33 #define CONFIG_ENV_OVERWRITE
34 
35 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
36 
37 /* Initial environment variables */
38 #define CONFIG_EXTRA_ENV_SETTINGS		\
39 	"script=boot.scr\0" \
40 	"image=Image\0" \
41 	"panel=NULL\0" \
42 	"console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \
43 	"fdt_addr=0x83000000\0"			\
44 	"fdt_high=0xffffffffffffffff\0"		\
45 	"boot_fdt=try\0" \
46 	"fdt_file=fsl-imx8qxp-mek.dtb\0" \
47 	"initrd_addr=0x83800000\0"		\
48 	"initrd_high=0xffffffffffffffff\0" \
49 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
50 	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
51 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
52 	"mmcautodetect=yes\0" \
53 	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
54 	"loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
55 	"bootscript=echo Running bootscript from mmc ...; " \
56 		"source\0" \
57 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
58 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
59 	"mmcboot=echo Booting from mmc ...; " \
60 		"run mmcargs; " \
61 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
62 			"if run loadfdt; then " \
63 				"booti ${loadaddr} - ${fdt_addr}; " \
64 			"else " \
65 				"echo WARN: Cannot load the DT; " \
66 			"fi; " \
67 		"else " \
68 			"echo wait for boot; " \
69 		"fi;\0" \
70 	"netargs=setenv bootargs console=${console} " \
71 		"root=/dev/nfs " \
72 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
73 	"netboot=echo Booting from net ...; " \
74 		"run netargs;  " \
75 		"if test ${ip_dyn} = yes; then " \
76 			"setenv get_cmd dhcp; " \
77 		"else " \
78 			"setenv get_cmd tftp; " \
79 		"fi; " \
80 		"${get_cmd} ${loadaddr} ${image}; " \
81 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
82 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
83 				"booti ${loadaddr} - ${fdt_addr}; " \
84 			"else " \
85 				"echo WARN: Cannot load the DT; " \
86 			"fi; " \
87 		"else " \
88 			"booti; " \
89 		"fi;\0"
90 
91 #define CONFIG_BOOTCOMMAND \
92 	   "mmc dev ${mmcdev}; if mmc rescan; then " \
93 		   "if run loadbootscript; then " \
94 			   "run bootscript; " \
95 		   "else " \
96 			   "if run loadimage; then " \
97 				   "run mmcboot; " \
98 			   "else run netboot; " \
99 			   "fi; " \
100 		   "fi; " \
101 	   "else booti ${loadaddr} - ${fdt_addr}; fi"
102 
103 /* Link Definitions */
104 #define CONFIG_LOADADDR			0x80280000
105 
106 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
107 
108 #define CONFIG_SYS_INIT_SP_ADDR         0x80200000
109 
110 /* Default environment is in SD */
111 #define CONFIG_ENV_SIZE			0x1000
112 #define CONFIG_ENV_OFFSET		(64 * SZ_64K)
113 #define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
114 
115 #define CONFIG_SYS_MMC_IMG_LOAD_PART	1
116 
117 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
118 #define CONFIG_SYS_MMC_ENV_DEV		1   /* USDHC2 */
119 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
120 #define CONFIG_SYS_FSL_USDHC_NUM	2
121 
122 /* Size of malloc() pool */
123 #define CONFIG_SYS_MALLOC_LEN		((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
124 
125 #define CONFIG_SYS_SDRAM_BASE		0x80000000
126 #define PHYS_SDRAM_1			0x80000000
127 #define PHYS_SDRAM_2			0x880000000
128 #define PHYS_SDRAM_1_SIZE		0x80000000	/* 2 GB */
129 /* LPDDR4 board total DDR is 3GB */
130 #define PHYS_SDRAM_2_SIZE		0x40000000	/* 1 GB */
131 
132 /* Serial */
133 #define CONFIG_BAUDRATE			115200
134 
135 /* Monitor Command Prompt */
136 #define CONFIG_HUSH_PARSER
137 #define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
138 #define CONFIG_SYS_CBSIZE              2048
139 #define CONFIG_SYS_MAXARGS             64
140 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
141 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
142 					sizeof(CONFIG_SYS_PROMPT) + 16)
143 
144 /* Generic Timer Definitions */
145 #define COUNTER_FREQUENCY		8000000	/* 8MHz */
146 
147 #ifndef CONFIG_DM_PCA953X
148 #define CONFIG_PCA953X
149 #define CONFIG_CMD_PCA953X
150 #define CONFIG_CMD_PCA953X_INFO
151 #endif
152 
153 /* Networking */
154 #define CONFIG_FEC_XCV_TYPE		RGMII
155 #define FEC_QUIRK_ENET_MAC
156 
157 #endif /* __IMX8QXP_MEK_H */
158