1 /* 2 * Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it> 3 * Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it> 4 * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> 5 * 6 * Configuration settings for the BTicion i.MX6DL Mamoj board. 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __IMX6DL_MAMOJ_CONFIG_H 12 #define __IMX6DL_MAMOJ_CONFIG_H 13 14 #include <linux/sizes.h> 15 #include "mx6_common.h" 16 17 /* Size of malloc() pool */ 18 #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) 19 20 /* Total Size of Environment Sector */ 21 #define CONFIG_ENV_SIZE SZ_128K 22 23 /* Allow to overwrite serial and ethaddr */ 24 #define CONFIG_ENV_OVERWRITE 25 26 /* Environment */ 27 #ifndef CONFIG_ENV_IS_NOWHERE 28 /* Environment in MMC */ 29 # if defined(CONFIG_ENV_IS_IN_MMC) 30 # define CONFIG_ENV_OFFSET 0x100000 31 # endif 32 #endif 33 34 #ifndef CONFIG_SPL_BUILD 35 #define CONFIG_EXTRA_ENV_SETTINGS \ 36 "scriptaddr=0x14000000\0" \ 37 "fdt_addr_r=0x13000000\0" \ 38 "kernel_addr_r=0x10008000\0" \ 39 "fdt_high=0xffffffff\0" \ 40 "dfu_alt_info_spl=spl raw 0x2 0x400\0" \ 41 "dfu_alt_info_uboot=u-boot raw 0x8a 0x11400\0" \ 42 BOOTENV 43 44 #define BOOT_TARGET_DEVICES(func) \ 45 func(MMC, mmc, 2) 46 47 #include <config_distro_bootcmd.h> 48 #endif 49 50 /* UART */ 51 #define CONFIG_MXC_UART_BASE UART3_BASE 52 53 /* MMC */ 54 #define CONFIG_SYS_MMC_ENV_DEV 2 55 #define CONFIG_SUPPORT_EMMC_BOOT 56 57 /* Ethernet */ 58 #define CONFIG_FEC_MXC_PHYADDR 1 59 #define CONFIG_MII 60 61 /* USB */ 62 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 63 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 64 #define CONFIG_MXC_USB_FLAGS 0 65 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 66 67 /* Falcon */ 68 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 69 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 70 #define CONFIG_CMD_SPL 71 #define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 72 #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) 73 74 /* MMC support: args@1MB kernel@2MB */ 75 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ 76 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) 77 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ 78 79 /* Miscellaneous configurable options */ 80 #define CONFIG_SYS_MEMTEST_START 0x80000000 81 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 82 83 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 84 #define CONFIG_SYS_HZ 1000 85 86 /* Physical Memory Map */ 87 #define CONFIG_NR_DRAM_BANKS 1 88 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 89 90 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 91 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 92 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 93 94 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 95 GENERATED_GBL_DATA_SIZE) 96 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 97 CONFIG_SYS_INIT_SP_OFFSET) 98 99 /* SPL */ 100 #include "imx6_spl.h" 101 102 #endif /* __IMX6DL_MAMOJ_CONFIG_H */ 103