1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2018 Simone CIANNI <simone.cianni@bticino.it> 4 * Copyright (C) 2018 Raffaele RECALCATI <raffaele.recalcati@bticino.it> 5 * Copyright (C) 2018 Jagan Teki <jagan@amarulasolutions.com> 6 * 7 * Configuration settings for the BTicion i.MX6DL Mamoj board. 8 */ 9 10 #ifndef __IMX6DL_MAMOJ_CONFIG_H 11 #define __IMX6DL_MAMOJ_CONFIG_H 12 13 #include <linux/sizes.h> 14 #include "mx6_common.h" 15 16 /* Size of malloc() pool */ 17 #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) 18 19 /* Total Size of Environment Sector */ 20 #define CONFIG_ENV_SIZE SZ_128K 21 22 /* Allow to overwrite serial and ethaddr */ 23 #define CONFIG_ENV_OVERWRITE 24 25 /* Environment */ 26 #ifndef CONFIG_ENV_IS_NOWHERE 27 /* Environment in MMC */ 28 # if defined(CONFIG_ENV_IS_IN_MMC) 29 # define CONFIG_ENV_OFFSET 0x100000 30 # endif 31 #endif 32 33 #ifndef CONFIG_SPL_BUILD 34 #define CONFIG_EXTRA_ENV_SETTINGS \ 35 "scriptaddr=0x14000000\0" \ 36 "fdt_addr_r=0x13000000\0" \ 37 "kernel_addr_r=0x10008000\0" \ 38 "fdt_high=0xffffffff\0" \ 39 "dfu_alt_info_spl=spl raw 0x2 0x400\0" \ 40 "dfu_alt_info_uboot=u-boot raw 0x8a 0x11400\0" \ 41 BOOTENV 42 43 #define BOOT_TARGET_DEVICES(func) \ 44 func(MMC, mmc, 2) 45 46 #include <config_distro_bootcmd.h> 47 #endif 48 49 /* UART */ 50 #define CONFIG_MXC_UART_BASE UART3_BASE 51 52 /* MMC */ 53 #define CONFIG_SYS_MMC_ENV_DEV 2 54 #define CONFIG_SUPPORT_EMMC_BOOT 55 56 /* Ethernet */ 57 #define CONFIG_FEC_MXC_PHYADDR 1 58 59 /* USB */ 60 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 61 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 62 #define CONFIG_MXC_USB_FLAGS 0 63 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 64 65 /* Falcon */ 66 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "args" 67 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage" 68 #define CONFIG_CMD_SPL 69 #define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000 70 #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) 71 72 /* MMC support: args@1MB kernel@2MB */ 73 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ 74 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) 75 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ 76 77 /* Miscellaneous configurable options */ 78 #define CONFIG_SYS_MEMTEST_START 0x80000000 79 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) 80 81 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 82 #define CONFIG_SYS_HZ 1000 83 84 /* Physical Memory Map */ 85 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 86 87 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 88 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 89 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 90 91 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 92 GENERATED_GBL_DATA_SIZE) 93 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 94 CONFIG_SYS_INIT_SP_OFFSET) 95 96 /* SPL */ 97 #include "imx6_spl.h" 98 99 #endif /* __IMX6DL_MAMOJ_CONFIG_H */ 100