1 /* 2 * Copyright (C) 2014 Gateworks Corporation 3 * Author: Tim Harvey <tharvey@gateworks.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 #ifndef __IMX6_SPL_CONFIG_H 8 #define __IMX6_SPL_CONFIG_H 9 10 #ifdef CONFIG_SPL 11 12 #define CONFIG_SPL_FRAMEWORK 13 14 /* 15 * see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals: 16 * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF 17 * - IMX6DQ has 2x IRAM of IMX6SDL but we intend to support IMX6SDL as well 18 * - BOOT ROM stack is at 0x0091FFB8 19 * - if icache/dcache is enabled (eFuse/strapping controlled) then the 20 * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to 21 * fit between 0x00907000 and 0x00918000. 22 * - Additionally the BOOT ROM loads what they consider the firmware image 23 * which consists of a 4K header in front of us that contains the IVT, DCD 24 * and some padding thus 'our' max size is really 0x00908000 - 0x00918000 25 * or 64KB 26 */ 27 #define CONFIG_SYS_THUMB_BUILD 28 #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/omap-common/u-boot-spl.lds" 29 #define CONFIG_SPL_TEXT_BASE 0x00908000 30 #define CONFIG_SPL_MAX_SIZE 0x10000 31 #define CONFIG_SPL_STACK 0x0091FFB8 32 33 /* NAND support */ 34 #if defined(CONFIG_SPL_NAND_SUPPORT) 35 #define CONFIG_SPL_NAND_MXS 36 #endif 37 38 /* MMC support */ 39 #if defined(CONFIG_SPL_MMC_SUPPORT) 40 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 41 #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ 42 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE 43 #endif 44 45 /* SATA support */ 46 #if defined(CONFIG_SPL_SATA_SUPPORT) 47 #define CONFIG_SPL_SATA_BOOT_DEVICE 0 48 #define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 49 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE 50 #endif 51 52 /* Define the payload for FAT/EXT support */ 53 #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) 54 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 55 #endif 56 57 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL) 58 #define CONFIG_SPL_BSS_START_ADDR 0x88200000 59 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ 60 #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 61 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 62 #define CONFIG_SYS_TEXT_BASE 0x87800000 63 #else 64 #define CONFIG_SPL_BSS_START_ADDR 0x18200000 65 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ 66 #define CONFIG_SYS_SPL_MALLOC_START 0x18300000 67 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 68 #define CONFIG_SYS_TEXT_BASE 0x17800000 69 #endif 70 #endif 71 72 #endif 73